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Rapidus unveils glass interposer to challenge TSMC
Rapidus, Japan's state-backed chipmaker, has developed a prototype glass interposer for artificial intelligence chips. The company says the technology could lower production costs and strengthen its challenge to industry leader TSMC as Japan pushes to rebuild its advanced semiconductor base. The interposer is a key component in advanced chip packaging. It's the world's first to be cut from a large square glass substrate rather than a conventional silicon wafer, according to Nikkei and company disclosures. Rapidus plans to begin mass production in 2028, integrating the technology into its roadmap for next-generation AI processors. Cost and scale advantages Interposers are typically produced from 300-millimeter silicon wafers and used to connect multiple chips within a single package. Rapidus uses a 600-millimeter-by-600-millimeter glass substrate instead. This format significantly reduces material waste and boosts output. A single glass substrate can yield more than ten times as many interposers as traditional silicon wafers. The larger format also enables production of interposers about 1.3 to 2 times bigger than rivals', allowing more chips to be integrated into one package. Glass offers higher power efficiency than silicon -- an increasingly important factor for energy-intensive AI workloads. Display expertise repurposed Glass processing poses technical challenges, including fragility during handling and warping risk as substrate sizes increase. To overcome these hurdles, Rapidus recruited former engineers from Japanese display makers such as Sharp. The company began pilot production in June 2025 at a cleanroom facility in Chitose, Hokkaido. A 600-millimeter substrate is large by semiconductor standards but relatively small in the LCD panel industry. By adapting mature liquid crystal display glass processing techniques for semiconductor use, Rapidus has significantly lowered development barriers. Industry context Major chipmakers are also exploring alternatives to silicon substrates. Intel is developing its own glass substrate technology, while TSMC currently mass-produces AI chips using silicon interposers and is advancing other approaches, such as redistribution layer interposers for advanced packaging. Rapidus senior managing executive officer Yasumitsu Orii said the company's lack of legacy manufacturing constraints allows it to adopt materials best suited for AI chips without being tied to existing processes. Technology roadmap Rapidus will showcase the glass interposer prototype starting December 17, 2025, at SEMICON Japan 2025 in Tokyo. President and CEO Atsuyoshi Koike is scheduled to speak during the exhibition. The company plans to release a process design kit for 2nm chips around March 2026. It aims to begin full-scale production in the second half of fiscal year 2027, which runs from April 2027 to March 2028. According to a business plan submitted to Japan's Ministry of Economy, Trade and Industry, Rapidus targets mass production of 1.4-nanometer chips in fiscal years 2029 to 2030. Total investment for developing and producing 2nm chips is projected to reach approximately JPY4 trillion (US$25.8 billion). Investments for the 1.4nm technology and subsequent generations are expected to surpass JPY3 trillion. Government and private backing The Japanese government has committed cumulative support of about JPY2.9 trillion through fiscal year 2027. It plans to invest an additional JPY100 billion in fiscal year 2025 through the Information-technology Promotion Agency. On the private side, Rapidus aims to raise about JPY130 billion in fiscal year 2025 and reach a cumulative total of JPY1 trillion by fiscal year 2031. Honda, Fujitsu, and Canon are among the companies that could join Toyota Motor and other existing shareholders as new investors.
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Rapidus announces new artificial intelligence design tools
Rapidus, Japan's government-backed semiconductor developer, is betting on artificial intelligence-enhanced design tools to give it an edge over its competitors, in an effort to speed up its chip-design process and minimize costs. The firm made the announcement during Semicon, a semiconductor-industry event being held in Tokyo from Wednesday to Friday at the Tokyo Big Sight convention center. Rapidus' newly announced suite of offerings, which will be rolled out next year, includes Raads Generator, an AI-assisted design tool modeled on large-scale language models -- AI systems trained on datasets -- and optimized for 2-nanometer chip manufacturing. The 2-nm chip is highly advanced in the semiconductor space, touting higher processing speed while reducing power usage. Rapidus is aiming to increase its capacity and compete with rivals such as Taiwan Semiconductor Manufacturing Co. (TSMC), which is ramping up production of such chips. Rapidus, which already uses AI in some aspects of its business, has estimated that AI integration will enable it to halve the length of design time and cut design costs by 30%. Takashi Ikuno, an associate professor at Tokyo University of Science, said AI will be "critical" for Japan's semiconductor industry. "Japan can't realistically compete with leading foundries such as TSMC from the viewpoint of scale and accumulated manufacturing experience. AI offers a way to compensate for these disadvantages by accelerating design cycles and reducing development costs," he said, describing it as bridging design and manufacturing, and leading to greater efficiencies. Japan was once a world leader in the semiconductor space, and in 2023 the Japanese government began seriously ramping up efforts to revive its previous status, pouring tens of billions of yen into supporting projects. In November 2025, the Ministry of Economy, Trade and Industry announced it would invest ¥100 billion in Rapidus as part of efforts to enhance Japan's semiconductor capabilities -- and through it, insulate from supply changes and enhance national security. But in the highly competitive space, a rush to incorporate and apply the latest technology is increasingly underway, and AI is already reshaping the semiconductor industry. Nvidia, Intel and Sony have adopted the use of AI "digital twins" to boost design productivity, and AI is expected to be increasingly incorporated into the design and manufacturing process. Looking ahead, Ikuno said that being competitive in the semiconductor industry will be less dependent on sheer size, "and more on how well companies can combine data, AI and manufacturing know-how." "At the same time, this shift highlights the need to develop human talent, not only in semiconductor engineering but also in AI, particularly people who can bridge both fields," Ikuno said.
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Japan's Rapidus Moves To Break Taiwan Semiconductor's Grip - Taiwan Semiconductor (NYSE:TSM)
As the global race to build cheaper, faster artificial intelligence chips intensifies, Japan's Rapidus is rolling out new manufacturing breakthroughs while challenging the long-standing dominance of Taiwan Semiconductor Manufacturing Company Ltd (NYSE:TSM) and other industry leaders. Rapidus Targets Lower-Cost AI Chip Production Rapidus has developed a cost-cutting technology for AI-focused semiconductors. It has created a prototype of an interposer cut from a large glass substrate, aiming to start mass production in 2028. The chipmaker is ramping up for full-scale production, intensifying competition with Taiwan Semiconductor, Nikkei reported Wednesday. Also Read: MediaTek Adopts Taiwan Semiconductor 2nm Breakthrough For Flagship Chip A January 2025 report said Rapidus is aiming to challenge Taiwan Semiconductor by preparing to deliver 2-nanometer chip samples to Broadcom Inc. (NASDAQ:AVGO). Rapidus leveraged International Business Machines Corp (NYSE:IBM)-backed technology and heavy government funding to build a homegrown advanced chip manufacturing base. In July, Rapidus said it had begun prototyping its 2-nanometer gate-all-around transistors at its IIM-1 foundry, with early wafers already showing electrical performance, as the company advances toward releasing a customer process kit in 2026 and launching mass production in 2027. Taiwan Semiconductor Defends Its 2-Nanometer Lead Taiwan Semiconductor continues to reinforce its leadership in 2-nanometer technology by expanding manufacturing sites and improving power efficiency and performance tailored for AI workloads. The company is pairing the advanced node with its Chip-on-Wafer-on-Substrate packaging technology to support larger and more complex computing demands. Demand for cutting-edge capacity is tightening. Apple Inc. (NASDAQ:AAPL) and Nvidia Corp. (NASDAQ:NVDA) are securing much of Taiwan Semiconductor's most advanced 2-nanometer output, contributing to a supply crunch that is pushing rival chip designers to explore alternative foundries as Taiwan Semiconductor races to add capacity. Samsung And Intel Pursue 2-Nanometer Comebacks Samsung Electronics Co., Ltd. (OTC:SSNLF) is working to regain momentum at the 2-nanometer node by stabilizing yields and scaling production at its fabrication plants in the U.S. and South Korea. Those efforts are beginning to attract early customers for processors and custom chips. Intel Corp. (NASDAQ:INTC) is also advancing its own 2-nanometer-class process as it seeks to restore its standing in the global foundry market and compete more directly for advanced AI chip contracts. TSM Price Action: Taiwan Semiconductor shares were up 0.53% at $288.38 during premarket trading on Wednesday, according to Benzinga Pro data. Read Next: Intel Taps Taiwan Semiconductor For Advanced 2nm Process For AI-Powered Chips: Report Photo by Gorodenkoff via Shutterstock TSMTaiwan Semiconductor Manufacturing Co Ltd$288.630.61%OverviewAAPLApple Inc$274.41-0.07%AVGOBroadcom Inc$342.910.47%IBMInternational Business Machines Corp$303.570.13%INTCIntel Corp$37.701.05%NVDANVIDIA Corp$177.750.02%SSNLFSamsung Electronics Co Ltd$65.2154.0%Market News and Data brought to you by Benzinga APIs
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Japan's state-backed chipmaker Rapidus has developed a prototype glass interposer that could cut AI chip production costs significantly. The company plans mass production by 2028, using 600mm glass substrates that yield 10 times more interposers than traditional silicon wafers. This breakthrough positions Rapidus to compete directly with TSMC as Japan invests heavily to rebuild its semiconductor industry.
Rapidus, Japan's state-backed chipmaker, has unveiled a prototype glass interposer that marks a significant shift in how AI chips are manufactured. The technology, which the company claims is the world's first to be cut from a large square glass substrate rather than a conventional silicon wafer, could lower production costs substantially and strengthen Japan's position against industry leader TSMC
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. The company plans to begin mass production in 2028, integrating the glass interposer into its roadmap for next-generation AI processors designed to handle increasingly demanding AI workloads1
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Source: Benzinga
The innovation centers on chip packaging, where interposers serve as critical components connecting multiple chips within a single package. Traditional interposers are produced from 300-millimeter silicon wafers, but Rapidus uses a 600-millimeter-by-600-millimeter glass substrate instead. This format significantly reduces material waste and boosts output, with a single glass substrate yielding more than ten times as many interposers as traditional methods
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. The larger format also enables production of interposers about 1.3 to 2 times bigger than rivals', allowing more chips to be integrated into one package while offering higher power efficiency than silicon—an increasingly important factor for energy-intensive AI applications.To overcome technical challenges including fragility during handling and warping risk as substrate sizes increase, Rapidus recruited former engineers from Japanese display makers such as Sharp
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. The company began pilot production in June 2025 at a cleanroom facility in Chitose, Hokkaido. By adapting mature liquid crystal display glass processing techniques for semiconductor use, Rapidus has significantly lowered development barriers—a 600-millimeter substrate is large by semiconductor standards but relatively small in the LCD panel industry1
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Source: DIGITIMES
Rapidus senior managing executive officer Yasumitsu Orii emphasized that the company's lack of legacy manufacturing constraints allows it to adopt materials best suited for AI chips without being tied to existing processes
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. This strategic advantage could prove crucial as the company works to challenge industry leaders in the advanced semiconductors market.Beyond manufacturing innovations, Rapidus announced a suite of AI-enhanced design tools at SEMICON Japan 2025, including Raads Generator, an AI-assisted design tool modeled on large-scale language models and optimized for 2-nanometer chips manufacturing
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. The company has estimated that AI integration will enable it to halve the length of design time and cut design costs by 30%2
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Source: Japan Times
Takashi Ikuno, an associate professor at Tokyo University of Science, noted that AI will be "critical" for Japan's semiconductor industry, stating that "Japan can't realistically compete with leading foundries such as TSMC from the viewpoint of scale and accumulated manufacturing experience. AI offers a way to compensate for these disadvantages by accelerating design cycles and reducing development costs"
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. Major players including Nvidia, Intel, and Samsung have already adopted AI "digital twins" to boost design productivity2
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Rapidus plans to release a process design kit for 2-nanometer chips around March 2026 and aims to begin full-scale production in the second half of fiscal year 2027, which runs from April 2027 to March 2028
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. According to a business plan submitted to the Ministry of Economy, Trade and Industry, Rapidus targets mass production of 1.4-nanometer chips in fiscal years 2029 to 20301
.Total investment for developing and producing 2nm chips is projected to reach approximately JPY4 trillion (US$25.8 billion), while investments for the 1.4nm technology and subsequent generations are expected to surpass JPY3 trillion
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. The Japanese government has committed cumulative support of about JPY2.9 trillion through fiscal year 2027 and plans to invest an additional JPY100 billion in fiscal year 2025 through the Information-technology Promotion Agency1
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. On the private side, Rapidus aims to raise about JPY130 billion in fiscal year 2025 and reach a cumulative total of JPY1 trillion by fiscal year 2031, with Honda, Fujitsu, and Canon among the companies that could join Toyota Motor and other existing shareholders as new investors1
.While Rapidus advances its technology, TSMC continues to reinforce its leadership in 2-nanometer technology by expanding manufacturing sites and improving power efficiency and performance tailored for AI workloads
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. The Taiwan-based foundry is pairing the advanced node with its Chip-on-Wafer-on-Substrate packaging technology to support larger and more complex computing demands3
. Demand for cutting-edge capacity is tightening, with Apple and Nvidia securing much of TSMC's most advanced 2-nanometer output3
.Major chipmakers are also exploring alternatives to silicon wafer substrates. Intel is developing its own glass substrate technology, while Samsung is working to stabilize yields and scale production at its fabrication plants in the U.S. and South Korea
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. A January 2025 report indicated that Rapidus is preparing to deliver 2-nanometer chip samples to Broadcom, leveraging IBM-backed technology and heavy government funding to build a homegrown advanced chip manufacturing base3
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