SK Hynix Develops High Bandwidth Storage Technology to Accelerate AI Performance in Mobile Devices

SK hynix merges DRAM and NAND into a single package for faster AI performance

Serving tech enthusiasts for over 25 years. TechSpot means tech analysis and advice you can trust. Forward-looking: Major memory manufacturers are seeking to expand their production capabilities to meet the industry's ever-growing demand for chips. SK hynix is aiming even higher, planning significant enhancements for AI workloads running on mobile and other edge devices. According to multiple Korean sources, SK hynix is developing a new type of computer memory aimed at accelerating local workloads. The High-Bandwidth Storage memory expands on the previously introduced High Bandwidth Flash technology by combining mobile DRAM and NAND Flash components in devices for portable computing. HBS is specifically designed to deliver higher performance for AI workloads in smartphones, tablets, and other mobile devices, sources said. The new chips may stack up to 16 layers of DRAM and NAND memory, interconnected through vertical wire fan-out elements. SK hynix first implemented VFO-based DRAM products with the Apple Vision Pro, but HBS adds complexity by integrating NAND Flash chips as well. The Korean memory maker introduced VFO in 2023, noting that the packaging technology would significantly improve efficiency, heat dissipation, and chip miniaturization. The main idea behind VFO is that chip layers are connected through vertical wires instead of curved ones. Compared with conventional wiring solutions, the vertical wire fan-out design reduces the space required to transfer electrons between layers by 4.6 times. Consequently, SK hynix reports that power efficiency improves by 4.9 percent, heat dissipation by 1.4 percent, and the package is 27 percent thinner than traditional chips. Unlike the HBF technology SK hynix is developing with SanDisk, HBS does not require through-silicon via connections. This should result in higher manufacturing yields and lower production costs, promoting wider adoption across the semiconductor industry. The new DRAM+NAND stacked design is expected to be packaged directly with the device's application processor, sources said. HBS memory is likely intended to accelerate data processing in smartphones and other SoC-based devices. SK hynix developed HBS specifically to enhance AI workload performance on mobile devices, though its actual performance will remain to be seen. The technology is slated for a formal introduction between 2029 and 2031. Meanwhile, the company is already struggling to meet customer demand for new chips in 2026.

SK hynix reportedly making High Bandwidth Storage (HBS): stacked chips for next-gen smartphones

TL;DR: SK hynix is developing High Bandwidth Storage (HBS), combining mobile DRAM and NAND in a single package using innovative Vertical Wire Fan-Out (VFO) technology. This multi-layer stacked memory aims to enhance AI performance in smartphones and tablets with faster data processing and lower manufacturing costs. SK hynix is reportedly developing High Bandwidth Storage (HBS), which infuses mobile DRAM and NAND into a single package, with the next-gen memory made for boosting AI performance in mobile devices like smartphones and tablets. In a new report from ETnews picked up by Korean analyst @Jukanlosreve, SK hynix is working on HBS by stacking low-power wide I/O (LPWIO) DRAM together with NAND. There's up to 16 layers of DRAM and NAND that can be stacked and interconnected through "Vertical Wire Fan-Out (VFO)" technology, improving data processing speed. SK hynix has previously commercialized LPWIO DRAM, and is now looking to use HBS by adding NAND to create a multi-memory stacked structure. The way that SK hynix will achieve this feat with HBS is the VFO advanced packaging, which SK hynix created in a world-first in 2023, vertically connecting each individual memory cell. This is different to conventional curved wire bonding, as VFO connects the wires in a straight line, which reduces required wiring length, and minimizes signal transmission loss and delay. Not only that, but the vertical interconnect structure allows greater I/O connections compared to traditional planar connections, increasing data processing performance. An SK hynix official explains: "VFO is an innovative next-generation packaging solution. By combining traditional wire bonding with advanced Fan-Out Wafer-Level Packaging (FOWLP) technology, we can minimize manufacturing costs without using TSV". This means we'll have HBS using stacked DRAM and NAND, packaged with an application processor (AP) and used inside of next-generation mobile devices like smartphones and tablets. AI performance through mobile devices is a big part of the future, where SK hynix can attempt to lead the on-device AI memory market with HBS, using its VFO advanced packaging technology. HBS isn't as intricate as HBM (High Bandwidth Memory) for the AI GPU market, as HBS doesn't require more advanced through-silicon via (TSV) packaging, where SK hynix will enjoy higher yields and lower manufacturing costs for its HBS chips.

SK hynix Is Reportedly Developing High Bandwidth Storage (HBS) By Stacking DRAM & NAND Chips; Will Significantly Boots AI Performance For Smartphones, Tablets

The advancements in High Bandwidth Memory (HBM) have led South Korean memory manufacturer SK hynix to tackle another performance bottleneck, which can be resolved by developing High Bandwidth Storage (HBS), enabling future smartphones and tablets to flaunt impressive AI capabilities. The company will achieve this feat by stacking up to 16 stacks of DRAM and NAND chips together using a technology called vertical wire fan-out (VFO) to improve data processing speeds. A report from ETNews states that for HBS to be a success, VFO packaging is paramount. SK hynix first introduced this technology in 2023, with High Bandwidth Storage now being incorporated in smartphones and tablets as generative AI becomes a ubiquitous entity. The implementation of HBS is possible all thanks to VFO, which helps connect the stacked DRAM and NAND chips in a straight line. Unlike conventional curved wire bonding, VFO reduces wiring distance, signal transmission loss, and delay, and allows for more I/O connections. All of these improvements combined help boost data processing performance. HBS will be packaged with a smartphone chipset, which is then fitted onto the smartphone's or tablet's logic board. There are no updates on which SoCs will support High Bandwidth Storage, but the Snapdragon 8 Elite Gen 6 Pro is rumored to support both LPDDR6 and UFS 5.0 storage, making it a prime candidate. Unlike HBM, HBS does not require Through Silicon Via (TSV), which is a process that requires penetrating the chip. The removal of this step results in lower manufacturing costs and increased yields, both of which will be music to the ears of those who wish to incorporate this storage. Apple is reported to use HBM and TSV for future devices, allowing iPhones to run more intensive AI models locally, so it should not be surprising to learn that the company is already exploring HBS.