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SK hynix and SanDisk announce new High Bandwidth Flash -- speedy HBF standard is targeted at inference AI servers
Typical NAND chips present in SSDs have steadily evolved in speed and capacity over time, with contemporary server-grade units capable of reaching 28 GB/s per unit. Somehow, that's still not enough for the AI world. In turn, SK Hynix and SanDisk have jointly announced HBF, or High Bandwidth Flash,
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SK hynix, Sandisk kick off standardization of HBF - The Korea Times
SK hynix's Icheon Campus in Gyeonggi Province / Courtesy of SK hynix SK hynix and Sandisk have teamed up for the global standardization of high-bandwidth flash (HBF), which is viewed as a new breakthrough for advancing artificial intelligence (AI) accelerators. SK hynix said Thursday it hosted a
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SK hynix and SanDisk have launched a joint effort to standardize High Bandwidth Flash (HBF), a next-generation flash memory architecture designed to fill the performance gap between HBM and SSDs. The new memory standard targets AI inference workloads and could reach commercialization by late 2027 or early 2028.

SK hynix and SanDisk have kicked off a formal collaboration to establish High Bandwidth Flash (HBF) as an industry standard, addressing critical bottlenecks in AI inference servers. The two memory giants hosted an inaugural event at SanDisk's Milpitas, California headquarters to launch the HBF Spec Standardization Consortium under the Open Compute Project, the world's largest organization for sharing data center product designs
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. This next-generation flash memory architecture aims to bridge the gap between HBM and SSDs, creating a critical middle layer for AI accelerators that demand both speed and capacity1
.The importance of NAND flash has surged as AI services increasingly shift toward inference, which requires fast and frequent access to large volumes of stored data to deliver real-time results
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. Current server-grade NAND chips can reach speeds of 28 GB/s per unit, but this falls short of what AI inference demands1
. HBF is specifically positioned as a supporting layer between HBM DRAM, which delivers around 1.2 TB/s per stack with current-gen HBM3E, and traditional flash SSDs. Industry observers speculate HBF chips could target speeds of at least 10 GB/s each, potentially achieving combined speeds in the hundreds of GB/s1
. This architecture could function similarly to an expanded on-SSD cache or as a fast block storage device comparable to Optane, though applications and operating systems may need optimization to use it efficiently.Power efficiency stands as a core design principle for HBF standardization, reflecting urgent concerns about datacenter energy consumption. High-end SSDs like the Micron 9650 consume 25 W at full capacity, a figure that scales alarmingly when considering exabyte-scale deployments with tens of thousands of drives
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. By securing both scalability and power efficiency required for AI inference, HBF aims to help data centers reduce total cost of ownership2
. SK hynix Chief Development Officer Ahn Hyun emphasized that "through HBF standardization, we will establish a cooperative framework and create new value by presenting an optimized memory architecture for customers and partners in the AI era"2
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Industry officials anticipate HBF could be commercialized in late 2027 or early 2028, while demand for comprehensive memory solutions that include HBM and HBF will fully expand around 2030
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. The companies are establishing a dedicated team to work on HBF standardization, with SK hynix stating they will "establish HBF as an industry standard and build a foundation for the entire AI ecosystem to grow together"2
. The standard specifically targets AI inference servers, where outputs that users produce need storage, and that storage need is projected to grow exponentially1
. This positions HBF to enhance AI accelerators by providing the storage capacity and bandwidth balance that current memory architectures struggle to deliver efficiently.Summarized by
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