Synopsys launches new software tools for AI chips after $35 billion Ansys acquisition

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Synopsys unveiled new software tools to tackle the increasing complexity of designing artificial intelligence chips, marking the first major product release following its $35 billion acquisition of Ansys. The tools address critical challenges like thermal management for stacked chiplets, aiming to streamline chip design workflows for companies like Nvidia, AMD, and Intel.

Synopsys Unveils Software Tools After Major Acquisition

Synopsys rolled out new software tools on Wednesday to address the fast-increasing complexity of designing artificial intelligence chips, marking the first wave of offerings since completing its $35 billion acquisition of engineering software firm Ansys

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. The announcement came at a conference in Silicon Valley, where the company showcased how it plans to integrate mechanical engineering solutions into traditional chip design workflows

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For decades, Synopsys has been a primary supplier of software used to arrange the tens of billions of transistors that constitute modern chips from companies like Advanced Micro Devices and Nvidia, which invested $2 billion in Synopsys last year

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. But the landscape has shifted dramatically. Flagship offerings from AMD and Nvidia are no longer single chips but instead comprise many smaller chiplets stacked and packaged together in increasingly complicated configurations

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Addressing Thermal Management for Stacked Chiplets

The increasing complexity of creating AI chips drove Synopsys' acquisition of Ansys, as chip designers now confront challenges that traditionally belonged to mechanical engineers. A critical concern involves thermal management for stacked chiplets: heat generated by one chiplet could cause it to warp or expand, potentially cracking and separating from neighboring components, thereby destroying complex chips that can cost tens of thousands of dollars

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Sassine Ghazi, CEO of Synopsys, explained that the new software tools aim to embed engineering capabilities directly into the platforms chip designers at Intel and other companies already use. "Typically you have engineers designing for each step in a siloed way," Ghazi said. "What ends up happening is that the product is more expensive and it's not operating at its maximum potential. We're putting them in the design phase, so you're able to achieve a better performance, lower power and definitely lower cost" .

Source: ET

Source: ET

Implications for AI Chip Design Workflows

The launch signals a significant shift in how AI chips will be developed moving forward. By breaking down silos between chip design and mechanical engineering disciplines, Synopsys aims to streamline the design process and enhance performance and power efficiency while achieving cost reduction

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. This integration matters because as AI workloads grow more demanding, the industry needs tools that can handle multi-chiplet architectures without sacrificing reliability or escalating power consumption.

For companies racing to develop next-generation AI accelerators, these tools could accelerate time-to-market while reducing design iterations. The ability to simulate thermal and mechanical stresses during the design phase rather than discovering issues during physical testing represents a substantial advantage. As chiplet-based designs become the industry standard, watch for how competitors respond and whether Synopsys' integrated approach becomes the template for future chip design platforms.

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