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New 3D-stacked memory tech seeks to dethrone HBM in AI inference -- d-Matrix claims 3DIMC will be 10x faster and 10x more efficient
Memory startup d-Matrix is claiming its 3D stacked memory will be up to 10x faster and run at up to 10x greater speeds than HBM. d-Matrix's 3D digital in-memory compute (3DIMC) technology is the company's solution for a memory type purpose-built for AI inference. High-bandwidth memory, or HBM, has
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Corsair and Pavehawk could finally break the memory wall as D-Matrix bets everything on stacked DRAM and custom silicon
Sandisk and SK Hynix recently signed an agreement to develop "High Bandwidth Flash," a NAND-based alternative to HBM designed to bring larger, non-volatile capacity into AI accelerators. D-Matrix is now positioning itself as a challenger to high-bandwidth memory in the race to accelerate
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D-Matrix, a memory startup, claims its 3D digital in-memory compute (3DIMC) technology will be 10x faster and more efficient than HBM for AI inference tasks. The company's Pavehawk and Corsair platforms aim to revolutionize memory architecture for AI applications.
D-Matrix, a memory startup, has unveiled its 3D digital in-memory compute (3DIMC) technology, positioning it as a formidable challenger to high-bandwidth memory (HBM) in the realm of AI inference. The company claims that its innovative approach could be up to 10 times faster and 10 times more energy-efficient than current HBM solutions
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.As AI workloads continue to grow, the industry has recognized the need for memory solutions tailored to specific computational tasks. While HBM has become essential for AI training and high-performance computing, it may not be the optimal choice for all scenarios, particularly in AI inference
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.D-Matrix argues that AI inference, which now constitutes up to 50% of some hyperscalers' AI workloads, requires a memory type built specifically for its unique demands
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. This aligns with a broader trend in the tech industry of developing hardware solutions optimized for particular computational tasks.The core of D-Matrix's innovation lies in its approach to memory architecture. The company's Pavehawk 3DIMC silicon, recently brought online in the lab, utilizes a unique design:

Source: TechRadar
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This design aims to dramatically reduce latency, improve bandwidth, and achieve new levels of efficiency by bringing compute and memory into tighter integration
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.D-Matrix is developing two key products to showcase its 3DIMC technology:
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.Built on a TSMC N5 logic die and combined with 3D-stacked DRAM, Pavehawk aims to push the boundaries of memory performance and efficiency
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Source: Tom's Hardware
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If successful, D-Matrix's technology could address several key challenges in the AI hardware industry:
Cost Reduction: HBM is produced by only a handful of companies and comes with a hefty price tag. An alternative could be attractive to cost-conscious AI buyers
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.Supply Chain Issues: Large players like Nvidia can secure top-tier HBM parts, but smaller companies often struggle. D-Matrix's solution could level the playing field
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.Scalability: By potentially offering lower-cost and higher-capacity alternatives, D-Matrix could address a central pain point in scaling inference at the data center level
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.While D-Matrix's claims are ambitious, the technology remains unproven in real-world applications. The company describes its journey as a multi-year process, and many previous attempts to tackle the "memory wall" have fallen short of reshaping the market
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.As the AI industry continues to grapple with the limits of scaling memory interfaces, D-Matrix's 3DIMC technology represents a bold attempt to rethink the relationship between compute and memory. Whether Pavehawk and Corsair will mature into widely adopted alternatives or remain experimental concepts remains to be seen, but their potential impact on AI inference hardware is undeniable
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