IBM Unveils Dual-Architecture Chip Running Arm and Z Instructions at 5.7 GHz on 2nm Process

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IBM revealed its first dual-architecture chip at Hot Chips 2026, featuring 11 cores built on 2nm process running at 5.7 GHz base frequency. Each core natively executes both Arm and Z instructions, switching between architectures in nanoseconds. The processor brings Arm's 22 million-developer ecosystem to mainframes while maintaining mission-critical reliability for enterprises.

IBM Breaks New Ground with Dual-ISA Mainframe Processor

IBM announced its first dual-architecture chip at the Hot Chips conference, marking what may be the most significant shift in mainframe architecture in decades

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. The next-gen mainframe AI processor features 11 high-performance cores built on a 2-nanometer process, each capable of natively executing both z/Architecture and AArch64 instructions at a base frequency above 5.7 GHz

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. The chip represents the first hardware milestone from IBM's collaboration with Arm, announced in April, and is designed to power future IBM Z and LinuxONE systems expected to arrive in 2028

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What sets this processor apart is IBM's engineering approach. Rather than creating a heterogeneous chip with separate Arm cores packaged alongside Z cores, IBM built each core to be bilingual. "Each processor core can natively execute Arm and IBM Z, or Arm and LinuxONE, instructions concurrently," IBM stated

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. The cores can switch between instruction sets dynamically within nanoseconds, with IBM claiming this switching overhead "amortizes to zero" in terms of performance impact

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. During the Hot Chips 2026 reveal, IBM stated it believes this is the first processor to treat both ISAs as "first-class citizens"

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Source: Tom's Hardware

Source: Tom's Hardware

Technical Architecture Enables Seamless ISA Switching

The dual-architecture chip relies on the Linux Kernel-level Virtual Machine (KVM hypervisor) to support AArch64 instructions, the same mechanism that allows IBM to support Linux on Z mainframes

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. Standard z/Architecture instructions bypass KVM entirely. Enterprises can run Arm64 Linux virtual machines and Linux on Z virtual machines side by side, with the hypervisor dispatching each virtual machine onto a physical core that flips into the corresponding mode

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The chip includes a full hardware implementation of AArch64 v9.3 with Scalable Vector Extension (SVE) support, handling 2,792 AArch64 instructions

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. IBM built automation tools to consume the ARM XML specifications and understand how to move instructions through the core, with the decode stage representing the biggest area of silicon expansion to support decoding AArch64 instructions

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. The core supports simultaneous multithreading, available to both ISAs, and implements new hardware structures for SVE and special data types like FP16

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Performance Specifications and Memory Architecture

The 2nm processor represents a substantial upgrade over IBM's current Telum II processor introduced in 2024, which features eight cores operating at up to 5.5 GHz

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. The new chip comes with 36 MB of private L2 cache, 432 MB of virtual L3 cache, and as much as 3.5 GB of virtual L4 cache—resources intended to keep latency low for large databases and transaction-heavy workloads

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. Christian Jacobi, Chief Technology Officer and IBM Fellow at IBM Systems Development, emphasized the performance: "That's really, really fast compared to what you otherwise get in the industry. It's just another example of how mainframe technology is not old technology. It's very modern, leading-edge technology"

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Source: The Register

Source: The Register

The processor includes AI inference accelerators for in-transaction fraud detection, a dedicated on-chip data processing unit for I/O acceleration, and hardware accelerators for compression, cryptography, and sorting

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. IBM also revealed its next-generation Spyre AI accelerator at Hot Chips 2026, featuring 16 cores with optimizations for newer AI data formats including FP4/MXFP4

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. The new accelerator transitions from LPDDR5 to HBM3e memory, with each accelerator containing 96 GB of HBM3e offering up to 4TB/s bandwidth—20x that of LPDDR5

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Strategic Shift Addresses Software Ecosystem Gap

The dual-architecture chip tackles a fundamental challenge facing IBM's mainframe business: the growing divergence between where enterprise software development happens and where mission-critical workloads run. Meredith Stowell, IBM's vice president for the zSystems Ecosystem, noted that "The Arm ecosystem includes more than 22 million developers worldwide and supports a rapidly growing portfolio of cloud-native, AI, analytics, infrastructure, and enterprise applications"

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. Much of the development in the software world, particularly around AI frameworks like PyTorch and ONNX Runtime, happens with x86 and Arm targets in mind, leaving the mainframe to figure out its own solution

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Source: VentureBeat

Source: VentureBeat

Tina Tarquinio, chief product officer at IBM for IBM Z and LinuxONE, explained the strategic imperative: "No matter how great our ecosystem team is, we would never be able to work with all of them and port them all"

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. IBM's dual-ISA core can execute Arm software without modifications, allowing Arm-based virtual machines to run as if they were operating on native-Arm silicon

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. This approach allows businesses to unify deployment rather than relying on separate Arm or x86 servers and z/Architecture mainframes for different purposes

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Market Implications and Future Outlook

George Cozma, an analyst at TechInsights, characterized the chip as "ending the platform's historical isolation from the broader computing mainstream," noting that while IBM Z's core strengths of reliability, security, and virtualization "remain the gold standard for mission-critical operations, they are tethered to an architecture that has increasingly diverged from the modern software development lifecycle"

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. The mainframe market remains "small in unit terms" but "strategically important," with customers rarely replacing these systems because "core applications, decades of operational practice, and data gravity make migration expensive and risky"

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IBM says its Z and LinuxONE systems run 68% of the world's production IT workloads, while 77 of the world's 100 largest banks use the platforms

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. The chip is a likely candidate for the z18 mainframe family, as IBM released its most recent generation, the z17, in 2025 and typically delivers new models every three years

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. Watch for how enterprises in highly regulated industries adopt this technology to run cloud-native and AI workloads alongside core transaction processing, and whether the approach successfully bridges the gap between mainframe reliability and modern software ecosystems.

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