Synopsys unveils autonomous chip design workflows with Microsoft, cuts debug time by up to 40%

Synopsys launches autonomous chip design workflows with Microsoft By Investing.com

SUNNYVALE, Calif. - Synopsys Inc. (NASDAQ:SNPS) announced today two autonomous chip design workflows developed with Microsoft and available for evaluation on Microsoft Discovery. The workflows, showcased at the 2026 DAC Chips to Systems Conference, include a debug closure workflow and an implementation and closure workflow. Both utilize Synopsys' AgentEngineer technology and are being evaluated by AMD. The debug closure workflow combines verification and root cause analysis, orchestrated through Microsoft Discovery. Early evaluations show reductions of 25% to 40% in debug cycle time, according to the company statement. The implementation and closure workflow automates quality-of-results tuning using Synopsys implementation agents and Fusion Compiler on Azure. The company reported improved quality-of-results in initial testing. These mark the first EDA applications available for evaluation on Microsoft Discovery. Customers can request evaluation access through Synopsys. "AI driven workflows powered by Discovery and leveraging AI tooling, such as RCA with deep EDA domain knowledge, are a paradigm we see accelerating scaling and deployment, helping improve both design velocity and overall silicon quality," said Alex Starr, AMD Corporate Fellow. Aseem Datar, Corporate Vice President of Product Innovation for Microsoft Discovery and Quantum, said the company designed Microsoft Discovery to accelerate scientific and engineering innovation with AI. The announcement builds on a previously disclosed collaboration between Synopsys, AMD, and Microsoft on agentic specification to RTL workflow. The information is based on a press release statement issued by Synopsys. This article was generated with the support of AI and reviewed by an editor. For more information see our T&C.

Synopsys Introduces Autonomous Agentic AI EDA Workflows For Chip Design in Collaboration with Microsoft And AMD

Synopsys, Inc. announced new autonomous agentic AI workflows for chip design, developed in collaboration with Microsoft and available for evaluation on Microsoft Discovery. Synopsys is advancing an open, interoperable agentic AI stack for autonomous workflows across the chip design lifecycle. Synopsys is introducing two new agentic EDA workflows, developed in collaboration with Microsoft and used by AMD, available for evaluation on Microsoft Discovery to accelerate chip design. This includes Synopsys fully-autonomous debug closure workflow: a fully autonomous AI-powered verification and root cause analysis (RCA) workflow orchestrated with Microsoft Discovery, brings together domain-specific and task-level agents to identify design failures, automate debug tasks, and accelerate validation?helping engineering teams resolve issues faster and improve silicon quality. Early evaluations show reductions of 25?40% in debug cycle time, saving many weeks of engineering efforts and improving productivity. Synopsys fully-autonomous implementation and closure workflow: an autonomous workflow leveraging Synopsys implementation agents and Fusion Compiler on Azure brings together domain-specific and task-level agents to automate implementation quality-of-results (QoR) tuning and closure. Initial results demonstrate improved QoR. Synopsys, AMD, and Microsoft are enabling AI-powered design workflows that combine large-scale reasoning, domain expertise, and cloud-scale compute to accelerate the development of the next generation of AI infrastructure silicon. This milestone builds on the existing collaboration and previously announced agentic specification to RTL workflow, marking the first EDA applications available for evaluation on Microsoft Discovery. AMD is actively evaluating the application of autonomous workflows to accelerate the development of their next-generation products.