Teradyne Unveils UltraFLEXplus S Series Test System to Tackle Edge AI Chip Manufacturing

Teradyne Expands Testing Platform with Space-Efficient Edge AI Solution

Teradyne has introduced the UltraFLEXplus S series, a new line of automated test equipment engineered specifically for semiconductor testing in edge AI applications1

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. The first model, UltraFLEXplus S24, is a 24-slot system designed to address the growing demand for testing edge AI chips while tackling one of high-mix manufacturing's most pressing challenges: floor space optimization. The compact, single-module system positions Teradyne to serve integrated device manufacturers and outsourced semiconductor assembly and test providers operating in high-mix, variable-volume production environments where every square meter counts.

Architectural Continuity Drives Engineering Efficiency

The UltraFLEXplus S series leverages the same instrument module ecosystem, IG-XL software environment, and test program library as Teradyne's existing quad-module UltraFLEXplus Q series1

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. This architectural alignment allows customers to reuse existing engineering investments and maintain workflow continuity across their testing operations2

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. By building the automated test system on proven architecture, Teradyne enables manufacturers to scale test operations without rebuilding their entire test development infrastructure. The system supports both engineering and production test insertions, including tri-temperature testing capabilities essential for validating device performance across operating conditions.

Targeting Multi-Sector Edge AI Demand

The test system for edge AI chips addresses semiconductor testing needs across automotive, industrial, and consumer markets1

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. The system handles microcontrollers, multimedia devices, and edge AI chips—components increasingly critical as AI processing shifts from cloud data centers to endpoint devices. Roy Chorev, vice president and general manager of Teradyne's Compute Test division, emphasized that floor space represents one of the biggest hidden costs in high-mix manufacturing, positioning the UltraFLEXplus S series as an economic solution1

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. The system is engineered to maximize utilization, overall equipment effectiveness, and output per unit of floor space—metrics that directly impact profitability in variable-volume production scenarios2

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Industry Showcase and Market Positioning

Teradyne plans to display the UltraFLEXplus S24 at SEMICON West, scheduled for October 13-15, 2026, in San Francisco, and at the IEEE International Test Conference running October 11-16 in San Antonio1

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. These industry events will provide manufacturers their first hands-on look at how the system balances compact design with comprehensive testing capabilities. As edge AI deployment accelerates across sectors, the ability to test these chips efficiently while managing facility costs becomes increasingly strategic. The UltraFLEXplus S series represents Teradyne's bet that semiconductor manufacturers will prioritize systems offering scalability without sacrificing engineering continuity or floor space efficiency.