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Your next CPU could be the biggest AI upgrade in years -- here's why
AI is fast approaching a fork in the road. The spiraling cost of memory for both personal and cloud platforms, rising compute costs for training next-gen models, and high user demand for cloud platforms have made AI quite expensive to both provide and use. Then there's the growing privacy concerns -- just how much sensitive personal information are we giving away to chatbots? The solution to all these problems increasingly looks like running models on your own devices. Whether that's Gemini's Nano models summarizing your emails on your phone or tweaking your LoRAs to generate images on your PC's GPU, running AI locally is already a powerful tool that, in theory, can do even more without an internet connection. However, this is easier said than done. Running your own large language models not only requires a large pool of expensive, fast RAM, but you also need an accelerator to crunch those numbers. While our smartphones have long supported NPUs for exactly this purpose, proprietary APIs and inconsistent software support have limited widespread adoption. Not to mention that flagship and mid-range phones have vastly different capabilities, meaning developers often have to maintain multiple code paths or fall back to slower CPU implementations anyway. Instead, accelerating basic AI workloads on the CPU is an increasingly popular middle ground. It might not be anywhere near as fast or as capable as running GPT-OSS on your NVIDIA 5090, but targeting the CPU means the tool runs on essentially anything, without the development headaches of proprietary drivers and APIs. With the right building blocks deeper in the CPU, this doesn't have to be as slow as it might sound at first. Mobile CPUs began moving toward more capable AI compute capabilities with Armv9 in 2021, which introduced SVE2. Rather than a fixed-width single instruction multiple data (SIMD) design, SVE2 uses a vector-length-agnostic model, allowing implementations to scale SIMD width from 128-bit up to 2048-bit depending on the hardware. In other words, it is a more flexible approach to doing fast math in parallel. It also added support for INT8 dot-product operations and enhanced support for low-precision arithmetic such as FP16, making it well-suited for modern quantized AI workloads. However, the real shift came with SME and SME2. SME2 extends the CPU with a dedicated matrix execution mode, including a new matrix register and hardware support for GEMM-style operations. Unlike traditional vector execution, SME2 is designed specifically for the dense linear algebra patterns that dominate transformer and LLM workloads, significantly reducing memory traffic and increasing throughput for matrix-multiplication-heavy tasks. Even if ideas like SME2 can't close the performance gap on power-hungry dedicated accelerators, they offer vastly improved performance over older CPUs without acceleration support -- up to 3x to 5x better in some cases, Arm cites. Importantly, they're low-power, take up very little extra space, and are easier to target from a development standpoint, as they're already embedded in common libraries like Arm's KleidiAi. SME2 is already available in MediaTek's Dimensity 9500 processor and will undoubtedly arrive in more next-gen chipsets built from Arm's C1 Ultra cores or licensed architectures. With the history lesson out of the way, in recent news, AMD and Intel announced a joint venture to bring AI Compute Extensions (ACE) to future CPUs. Much like Arm has already done, this brings native matrix instructions to the x86 ISA, along with support for tiny INT4 sub-byte types and more conventional BF16 and FP16 data types, all from the familiar CPU instruction set. This builds on existing AVX instructions, delivering consistent, enhanced functionality and faster parallel math processing across vendors on the x86 platform, making life much easier for developers looking to bring AI workloads to consumer products. Just like modern phone processors, ACE is integrated directly into the CPU pipeline, meaning no external GPU/NPU offloading or external APIs are required. While implementation details will vary across vendors, SME2 and ACE both represent tightly integrated CPU matrix execution capabilities rather than offload-style accelerator architectures. CPUs are evolving beyond vector SIMD into architectures that natively support tensor and matrix computation. While GPUs' hugely parallel nature will remain dominant for large-scale training and running the largest models, CPUs are rapidly becoming far more capable for on-device and low-latency AI inference workloads. Perhaps the most important part is that it will be much easier for developers to target CPU-based AI acceleration across phones, laptops, and PCs, without relying on proprietary GPU or NPU APIs. If there's one drawback, it's that existing phones and laptops won't benefit, but perhaps your next upgrade will.
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Arm, Intel and AMD update upcoming CPUs: a big boost for on-device assistants
Windows 11 PCs and phones should gain faster AI and battery life Arm, Intel, and AMD are reworking their next chip designs so more generative AI can run directly on phones and laptops. You'll start seeing that in the next wave of Windows 11 PCs and next-generation smartphones. The main shift is where the work gets done. Instead of sending every AI request to the cloud, or asking a power-hungry GPU to take care of it all, more of those tasks should run on the CPU alongside NPUs. That can mean less lag, better privacy for your messages, documents, and photos, and lower power use. Industry estimates put many NPU workloads at 5 to 10W, compared with roughly 30 to 40W on a GPU. If those estimates hold up, that could translate to about 1.5 to 3 extra hours of laptop battery life. On the PC side, AMD says its Zen 5-based Ryzen AI 300 chips can reach up to 50 TOPS, about three times the last generation. Intel is making a similar claim: it says Lunar Lake and Arrow Lake are aiming for roughly triple the neural performance of earlier chips, with Lunar Lake expected to clear 40 TOPS for Copilot+ PCs. On the mobile side, Arm says Cortex-X925 improves AI performance by 41%. It's also pushing its Kleidi libraries for PyTorch and TensorFlow, which should make CPU acceleration easier to work with. Intel and AMD are also backing ACE to standardize x86 AI features. If you use assistants, writing tools, or image features on a regular basis, this is something to watch. Still, it's smart to wait for independent battery and speed tests before putting too much weight on the early numbers. You won't download this as an app. It'll arrive in upcoming Windows 11 PCs and next-generation smartphones.
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Arm, Intel, and AMD are redesigning their next-generation CPUs to handle AI workloads directly, moving computation away from cloud servers and power-hungry GPUs. The shift promises faster on-device assistants, better privacy, and significantly improved battery life for phones and laptops running Windows 11 and beyond.
Arm, Intel, and AMD are fundamentally rethinking how CPUs handle artificial intelligence, introducing native matrix computation capabilities that could reshape how we interact with AI on phones and laptops
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. Instead of routing every request to cloud platforms or relying exclusively on dedicated accelerators, the next wave of processors will execute generative AI tasks on phones and laptops directly on the CPU alongside NPUs. This CPU AI approach addresses spiraling memory costs, privacy concerns about sensitive data sent to chatbots, and the growing demand for running AI models locally1
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Source: Android Authority
The technical foundation for this AI upgrade began with Arm's introduction of SVE2 in 2021 as part of Armv9, which brought flexible vector processing capabilities. But the real transformation arrived with SME2, which extends the CPU with dedicated matrix execution mode and hardware support for GEMM-style operations specifically designed for transformer and LLM inference workloads
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. SME2 delivers 3x to 5x better performance over older CPUs without acceleration support while consuming minimal power and chip space, according to Arm. The technology already ships in MediaTek's Dimensity 9500 processor and will appear in more chipsets built from Arm's C1 Ultra cores1
.In a significant development, AMD and Intel announced a joint venture to bring AI Compute Extensions (ACE) to future CPUs, introducing native matrix instructions to the x86 instruction set architecture
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. ACE supports INT4 sub-byte types along with BF16 and FP16 data types, building on existing AVX instructions to deliver consistent CPU-based AI acceleration across vendors. This standardization means developers can target AI workloads without wrestling with proprietary GPU or NPU APIs, dramatically simplifying the path to bringing AI features to consumer products1
.The performance gains are substantial. AMD's Zen 5-based Ryzen AI 300 chips can reach up to 50 TOPS, approximately three times the previous generation
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. Intel's Lunar Lake and Arrow Lake architectures aim for roughly triple the neural performance of earlier chips, with Lunar Lake expected to exceed 40 TOPS for Copilot+ PCs2
. On mobile platforms, Arm's Cortex-X925 delivers a 41% AI performance improvement, supported by Kleidi libraries for PyTorch and TensorFlow that make CPU acceleration more accessible to developers2
.The shift toward CPU for AI inference carries practical benefits beyond raw speed. Industry estimates suggest many NPU workloads consume 5 to 10W compared with roughly 30 to 40W on a GPU
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. If these figures hold, users could see approximately 1.5 to 3 extra hours of laptop battery life when running on-device assistants, writing tools, or image processing features2
. Running AI models locally also means messages, documents, and photos stay on your device rather than traveling to cloud servers, addressing growing privacy concerns1
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.While GPUs will remain dominant for large-scale training and running the largest models due to their massively parallel architecture, CPUs are rapidly becoming far more capable for low-latency inference workloads
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. The evolution from vector SIMD into architectures that natively support tensor and matrix computation represents a fundamental shift in processor design. Developers gain a consistent target across phones, laptops, and PCs without maintaining multiple code paths for different accelerators1
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These capabilities will arrive in upcoming Windows 11 PCs and next-generation smartphones rather than as downloadable software updates
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. Existing phones and laptops won't benefit from these architectural improvements, meaning the real impact comes with your next hardware upgrade1
. For users who regularly interact with assistants, writing tools, or image features, the combination of reduced lag, better privacy, and extended battery life could make this one of the most meaningful upgrades in years. However, waiting for independent battery and speed tests before weighing manufacturer claims remains advisable2
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