Google taps Marvell Technology for new AI inference chips as compute costs shift to serving models

Google in talks with Marvell to build new AI chips, The Information reports

April 19 (Reuters) - Alphabet's Google (GOOGL.O), opens new tab is in talks with Marvell Technology (MRVL.O), opens new tab to develop two new chips aimed at running AI models more efficiently, The Information reported on Sunday citing two people with knowledge of the discussions. One of the chips is a ⁠memory processing unit designed to work with Google's tensor processing unit (TPU) and the other chip is a new TPU built specifically for running AI models, the report said. Google has been pushing to make its TPUs a viable alternative to Nvidia's dominant GPUs. TPU sales have become ⁠a key driver of growth in Google's cloud revenue as it aims to show investors that its AI investments are generating returns. Reuters could not ⁠immediately verify the report. Google and Marvell did not immediately respond to a request for a comment. The ⁠companies aim to finalize the design of the memory processing unit as soon as ⁠next year before handing it off for test production, according to the report. Reporting by Angela Christy in Bengaluru Editing by Tomasz Janowski Our Standards: The Thomson Reuters Trust Principles., opens new tab

Google in talks with Marvell Technology to build new AI inference chips alongside Broadcom TPU programme

Summary: Google is in talks with Marvell Technology to develop two new AI chips - a memory processing unit and an inference-optimised TPU - adding a third design partner alongside Broadcom and MediaTek in its custom silicon supply chain. The discussions, which have not yet produced a signed contract, came days after Broadcom locked in a through-2031 TPU agreement and reflect Google's shift toward inference as the dominant compute cost, as the custom ASIC market is projected to grow 45% in 2026 and reach $118 billion by 2033. Google is in talks with Marvell Technology to develop two new chips for running AI models, according to The Information. One is a memory processing unit designed to work alongside Google's existing Tensor Processing Units. The other is a new TPU built specifically for inference, the phase of AI where models serve users rather than learn from data. Marvell would act in a design-services role, similar to MediaTek's involvement on Google's latest Ironwood TPU. The discussions have not yet produced a signed contract. The talks came days after Broadcom, Google's primary custom chip partner, announced a long-term agreement to design and supply TPUs and networking components through 2031. The timing suggests Google is not replacing Broadcom but adding a third design partner to a supply chain that already includes Broadcom for high-performance chip variants, MediaTek for cost-optimised "e" variants at 20 to 30% lower cost, and TSMC for fabrication. The strategy is diversification, not substitution. Google's seventh-generation TPU, Ironwood, debuted this month as what the company calls "the first Google TPU for the age of inference." It delivers ten times the peak performance of the TPU v5p and scales to 9,216 liquid-cooled chips in a superpod spanning roughly 10 megawatts, producing 42.5 FP8 exaflops. Google plans to build millions of Ironwood units this year. The Marvell-designed chips would supplement rather than replace Ironwood, potentially targeting different workload profiles or cost points for the growing share of Google's compute that goes to serving AI models rather than training them. The shift from training to inference as the primary demand driver is reshaping the chip market. Training a frontier model is a one-time event that requires enormous compute for weeks or months. Inference runs continuously, serving every query from every user, and its costs scale with demand rather than capability. As AI products reach hundreds of millions of users, inference becomes the dominant expense, and purpose-built inference silicon becomes a competitive advantage that general-purpose GPUs cannot match on cost or efficiency. The Google-Marvell relationship has a longer history than this week's report suggests. The Information reported in 2023 that Google had been working since 2022 on a chip codenamed "Granite Redux" that would use Marvell instead of Broadcom, with Google expecting to save billions of dollars annually. At the time, Google's spokesperson called Broadcom "an excellent partner" and said the company was "productively engaged with Broadcom and multiple other suppliers for the long term." What changed between 2023 and now is that Google appears to have abandoned the idea of dropping Broadcom entirely. The through-2031 agreement locked in that relationship. Instead, Google is building a multi-supplier architecture in which Broadcom, MediaTek, and potentially Marvell each handle different parts of the TPU programme, competing on specific segments rather than for the entire contract. The approach mirrors how automotive companies manage component suppliers: no single vendor gets enough leverage to dictate terms. Marvell's data centre revenue reached a record $6.1 billion in its fiscal year ending February 2026, with total revenue of $8.2 billion, up 42% year over year. The company runs a custom silicon business with a $1.5 billion annual run rate across 18 cloud-provider design wins, building chips for Amazon (Trainium processors), Microsoft (Maia AI accelerator), and Meta (a new data processing unit), in addition to its existing work with Google on the Axion ARM CPU. Nvidia invested $2 billion in Marvell at the end of March, partnering through NVLink Fusion to integrate Marvell's custom chips and networking with Nvidia's interconnect fabric. The deal positions Marvell at the intersection of both the GPU and ASIC ecosystems. In December 2025, Marvell acquired Celestial AI for up to $5.5 billion, gaining photonic interconnect technology that CEO Matt Murphy said would deliver "the industry's most complete connectivity platform for AI and cloud customers." Murphy is targeting 20% market share in custom AI chips and expects roughly 30% year-over-year revenue growth in fiscal 2027. Marvell's stock has rallied approximately 50% year to date, with a 30% gain in April alone following the Nvidia partnership and the Google talks. Barclays analyst Tom O'Malley upgraded the stock to overweight and raised his price target from $105 to $150. The Marvell talks do not appear to have weakened Broadcom's position. Broadcom commands more than 70% market share in custom AI accelerators. Its AI revenue hit $8.4 billion in its most recent quarter, up 106% year over year, with guidance of $10.7 billion for the following quarter. The company is targeting $100 billion in AI chip revenue by 2027. Broadcom's shares rose more than 6% on the day it announced the Google extension, and Mizuho analysts estimated the company would record $21 billion in AI revenue attributable to its Google and Anthropic relationships in 2026, rising to $42 billion in 2027. Anthropic will access approximately 3.5 gigawatts of next-generation TPU-based compute starting in 2027. The broader ASIC market is growing faster than the GPU market. TrendForce projects custom chip sales will increase 45% in 2026, compared with 16% growth in GPU shipments. Counterpoint Research projects Broadcom will hold roughly 60% of the custom AI accelerator market by 2027, with Marvell at approximately 25%. The market itself is expected to reach $118 billion by 2033. Google's chip strategy now involves four partners (Broadcom, MediaTek, Marvell, and TSMC), its own in-house design team, and a product line that spans training, inference, and general-purpose cloud compute. The complexity is deliberate. Every hyperscaler that depends on a single chip supplier, whether Nvidia or anyone else, faces pricing risk, supply risk, and the strategic vulnerability of building a business on someone else's silicon. The inference focus of the Marvell discussions reflects a shift in where the money goes. Training Nvidia's latest chips remain dominant in training workloads, but inference is where the volume is, and volume is where custom silicon's cost advantages compound. Google serves billions of AI-augmented search queries, Gemini conversations, and Cloud AI API calls every day. Shaving even a small percentage off the cost per inference across that scale translates into billions of dollars annually, which is precisely what the 2023 "Granite Redux" discussions were about. The talks with Marvell are not yet a deal, and chip development timelines mean any resulting product is likely years from production. But the direction is clear. Google is building a chip supply chain designed to support the most demanding AI inference workloads in the world, and it intends to have more than one partner capable of building the silicon that runs them. For Marvell, a Google inference TPU contract would validate its position as the second-most important custom AI chip designer in the world. For Google, it would mean one more supplier in a market where no company can afford to depend on just one.

Google Reportedly Pulls Marvell Into a Two-Chip TPU Plan That Could Reshape AI Inference For ASICs

Google is reportedly working with Marvell on the development of two chips, one of which optimizes existing TPUs, & the other one is a next-gen TPU design. Talks between Google & Marvell have commenced on the development of two brand new chips for AI inference, reports The Information. While the exact nature of what stage the talks are currently in remains a mystery, based on the initial assessment that two chips have been proposed by Google, one aiming to boost existing TPUs, & the second chip being a brand new TPU design, it looks like a baseline has been set. The two chips that have been discussed are very different in their purpose. The first one is related to the TPU, but rather than being a custom TPU silicon, it is going to be a memory processing unit that pairs with a TPU. We can think of in-memory processing being one of the aspects where this specific accelerator or IP block will offset some of the memory requirements from the chip or system and send it over to the dedicated MPU. The second chip that has been discussed is a next-gen TPU, which will specifically be optimized for AI inference models. Currently, Google's flagship AI accelerator is its TPU v7 or Ironwood series. TPU v7 offers 192 GB HBM memory, 4614 TFLOPs of peak performance, and is packaged into the Superpod, which is made up of 9216 chips. Based on the reports, we can expect next-generation Google TPUs coupled with the aforementioned MPUs to further accelerate the memory subsystem for faster AI model performance, especially in the inferencing segment.