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Rambus targets agentic AI workloads with faster client memory chipset - SiliconANGLE
Rambus targets agentic AI workloads with faster client memory chipset Rambus Inc. today announced a complete DDR5 9600 client memory module chipset designed to push PC memory speeds to 9,600 megatransfers per second, targeting the bandwidth and capacity demands of agentic artificial intelligence workloads on desktops and laptops. The new offering from the chip and silicon intellectual property company combines a second-generation client clock driver, dubbed CKD02, with a PMIC5120 power management integrated circuit and a serial presence detect hub. Together, the three chips provide what Rambus describes as a complete solution for clocked DDR5 modules operating between 8,000 and 9,600 MT/s. The chipset is built for the emerging CUDIMM and CQDIMM module formats used in desktops and the CSODIMM format used in laptops. Those clocked module designs are intended to overcome the signal integrity, clock jitter and timing instability problems that emerge when DDR5 memory is pushed beyond 6,400 MT/s. An on-module clock driver conditions and redistributes the clock signal across the dynamic random-access memory chips on the module, allowing higher data rates without the degradation that would otherwise occur. Rambus argues the timing aligns with a shift in how PCs handle AI. Agentic systems, which plan, execute and adapt workflows in real time, require persistent context, concurrent processing and continuous data movement between the processor and system memory. That translates to sharp increases in both bandwidth and capacity at the module level, the company said. "Agentic workloads are fundamentally more memory-hungry, driving the need for higher memory bandwidth, greater capacity and improved efficiency in AI-enabled PCs," said Rami Sethi, senior vice president and general manager of memory interface chips at Rambus. "Our DDR5 9600 Client Chipset, featuring the Gen2 Client Clock Driver, delivers the performance foundation needed to enable this new era of intelligent, high-performance client systems for AI-driven productivity, next-generation gaming and professional content creation." Within the chipset, the Gen2 client clock driver retimes, conditions and distributes the clock signal sent from the processor to the DRAM devices on the module. The PMIC5120 steps down system voltage to the levels needed to power the DRAM and the other active chips on the module. The SPD hub handles module identification, configuration and telemetry communication. Jeff Janukowicz, research vice president at International Data Corp., said memory is becoming a bottleneck as AI workloads spread across client devices. Clocked architectures like CUDIMM and CSODIMM are how the industry is dealing with the signal integrity and timing problems that show up at higher data rates, he added, and full chipset solutions that hold stable at those speeds will be a factor in how quickly next-generation AI PCs catch on. The launch extends Rambus' memory module chipset portfolio from server platforms into client systems, including next-generation AI PCs, notebooks and workstations.
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Rambus Pushes DDR5 To 9600 MT/s With Gen2 CKD Chipset, Setting The Stage For Intel Nova Lake & AMD Zen 6 AI PCs
Rambus is rolling out its fastest DDR5 Client Chipset solution, equipped with the Gen2 CKD that drives up to 9600 MT/s memory speeds natively. Next-Gen CPU Platforms Are About To Get A Big Boost In DDR5 Memory Performance With Rambus's Latest Client Chip Solution Later this year, we are going to see some brand new additions in the desktop and mobile CPU segments. Intel will have its Nova Lake CPUs out, and AMD will be prepping its next-gen Zen 6-based Ryzen families. As the industry prepares for these new CPU platforms to power the next iteration of AI PCs, memory firms are accelerating their development to address growing bandwidth and capacity requirements. Rambus is one of the premier IP providers in this segment, and today, they are rolling out their latest DDR5 chipset for client platforms, which includes three major controllers: Gen2 Client Clock Driver (CKD02), PMIC5120 & SPD Hub, enabling up to 9600 MT/s speeds natively. The Rambus DDR5 9600 Client Chipset supports high-bandwidth, high-capacity, clocked client memory modules and includes: * Gen2 Client Clock Driver retimes, conditions, and distributes the clock sent from the processor to the DRAM devices on the DIMM * PMIC5120 efficiently steps down the system voltage supply to the voltage levels needed to power the DRAM and all other active chips on the module * SPD Hub enables communication of module identification, configuration, and telemetry Press Release: Rambus, a premier chip and silicon IP provider making data faster and safer, today announced its complete DDR5 9600 Client Memory Module Chipset for high-performance CUDIMM, CQDIMM, and CSODIMM modules in future generation AI PCs. The chipset includes the new Gen2 Client Clock Driver (CKD02), delivering breakthrough performance with support for PC memory module operation of up to 9600 MT/s, Power Management IC (PMIC5120), and Serial Presence Detect Hub (SPD Hub). With the rise of agentic AI, PCs now plan, execute, and adapt workflows in real time. These workloads require persistent context, concurrent processing, and continuous data movement between the processor and system memory, requiring significant increases in both bandwidth and capacity. At the same time, scaling DDR5 memory beyond 6400 MT/s introduces new technical challenges, including signal degradation, clock jitter, and timing instability. To address these challenges, the industry is transitioning to clocked memory modules, including CUDIMM and CQDIMM for desktops and CSODIMM for laptops, which incorporate an on-module client clock driver (CKD) to condition and redistribute the clock signal. The new Rambus DDR5 9600 Client Chipset provides a complete solution for clocked DDR5 modules operating from 8000 to 9600 MT/s. Designed for performance and scalability, the chipset supports next-generation AI PCs, notebooks, and workstations. By addressing signal integrity, power delivery, and system coordination at the module level, Rambus simplifies the design and deployment of high-performance memory module solutions. Follow Wccftech on Google to get more of our news coverage in your feeds.
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Rambus announced a complete DDR5 9600 client memory module chipset designed to push PC memory speeds to 9,600 megatransfers per second. The chipset targets bandwidth and capacity demands of agentic AI workloads on desktops and laptops, setting the stage for Intel Nova Lake and AMD Zen 6 platforms launching later this year.

Rambus announced a complete DDR5 9600 client memory module chipset engineered to deliver 9,600 megatransfers per second, directly addressing the escalating bandwidth and capacity requirements of agentic AI workloads running on desktops and laptops
1
. The chip and silicon intellectual property company's new offering combines three critical components: a second-generation client clock driver designated CKD02, a PMIC5120 power management integrated circuit, and a serial presence detect hub1
. Together, these chips provide what Rambus describes as a complete solution for clocked DDR5 modules operating between 8,000 and 9,600 MT/s1
.The timing of this launch aligns with the anticipated arrival of next-gen CPU platforms later this year. Intel Nova Lake CPUs and AMD Zen 6-based Ryzen families are expected to power the next iteration of AI PCs, creating urgent demand for memory solutions that can keep pace
2
. As the industry prepares for these platforms, memory firms are accelerating development to address growing bandwidth and capacity requirements2
. The Gen2 CKD Chipset supports high-bandwidth, high-capacity clocked client memory modules built for the emerging CUDIMM and CQDIMM module formats used in desktops and the CSODIMM format used in laptops1
.Scaling DDR5 memory beyond 6,400 MT/s introduces significant technical obstacles, including signal degradation, clock jitter, and timing instability
2
. Clocked module designs are intended to overcome the signal integrity and timing challenges that emerge when DDR5 memory is pushed to higher speeds1
. An on-module client clock driver conditions and redistributes the clock signal across the dynamic random-access memory chips on the module, allowing higher data rates without the degradation that would otherwise occur1
. Within the chipset, the Gen2 client clock driver retimes, conditions and distributes the clock signal sent from the processor to the DRAM devices on the module1
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Rambus argues the timing aligns with a fundamental shift in how PCs handle AI. Agentic systems, which plan, execute and adapt workflows in real time, require persistent context, concurrent processing and continuous data movement between the processor and system memory
1
. That translates to sharp increases in both memory bandwidth and capacity at the module level1
. "Agentic workloads are fundamentally more memory-hungry, driving the need for higher memory bandwidth, greater capacity and improved efficiency in AI-enabled PCs," said Rami Sethi, senior vice president and general manager of memory interface chips at Rambus1
. The chipset delivers the performance foundation needed to enable this new era of intelligent, high-performance client systems for AI-driven productivity, next-generation gaming and professional content creation1
.Jeff Janukowicz, research vice president at International Data Corp., said memory is becoming a bottleneck as AI workloads spread across client devices
1
. Clocked architectures like CUDIMM and CSODIMM are how the industry is dealing with the signal integrity and timing problems that show up at higher data rates, and full chipset solutions that hold stable at those speeds will be a factor in how quickly next-generation AI PCs catch on1
. The launch extends Rambus' memory module chipset portfolio from server platforms into client systems, including next-generation AI PCs, notebooks and workstations1
. By addressing signal integrity, power delivery and system coordination at the module level, Rambus simplifies the design and deployment of high-performance memory module solutions2
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