SK hynix and Sandisk unveil High Bandwidth Flash spec with up to 3 TB/s bandwidth, 512GB capacity

Sandisk and SK hynix unveil HBF spec -- up to 16-Hi NAND stacks, 3 TB/s bandwidth, UCIe

Sandisk and SK hynix on Tuesday formally introduced the High Bandwidth Flash (HBF) specification, their jointly developed storage technology that promises to bring together the non-volatility of 3D NAND and the performance of High Bandwidth Memory (HBM), which will be handy for AI inference systems. The specification was released through the Open Compute Project (OCP), so it will be an open standard rather than a proprietary interface. The initial specification defines HBF packages with capacities of up to 512GB using either 8-Hi or 16-Hi NAND die stacks, though these will not be standard 3D NAND stacks, but rather specialized devices with a fast interface. In fact, Sandisk once called them HBF core dies rather than 3D NAND die stacks. Performance of HBF is divided into three bandwidth grades ranging from approximately 0.4 TB/s to 3.0 TB/s (though we are not sure whether this figure describes the full HBF subsystem or per-package bandwidth). Such a huge performance range implies that Sandisk and SK hynix expect HBF to have a multi-year roadmap featuring multiple implementations and generations of HBF. It is noteworthy that the most capable implementation of HBF (3 TB/s) is set to beat the memory bandwidth of a single HBM4 memory stack (2 TB/s), though it will be unlikely to beat HBM4 when it comes to latency. Interestingly, SK hynix claims that HBF uses the Universal Chiplet Interconnect Express (UCIe) standard to simplify integration with heterogeneous computing platforms, whereas Sandisk claims that HBF is set to adopt the 'xPU-HBF' interface, which could be its definition of UCIe implemented by companies like Broadcom or Marvell. In addition to capacity and performance targets, the specification establishes electrical and interface characteristics, packaging and reliability guidelines for stacked HBF devices, as well as software I/O requirements. For now, these specifications are not officially published by the OCP. Extracting 400 GB/s of bandwidth from a single 512GB HBF package is not a trivial task. To enable such a package, Sandisk once planned to use 16 HBF core dies that feature many, many arrays that can be accessed concurrently using dedicated read/write paths. Meanwhile, it is possible to reach over 400 GB/s of bandwidth per package using a single UCIe interface that runs at up to 64 GT/s and features 64 lanes. Yet, this means that the HBF base die will be a fairly complex piece of silicon. Sandisk and SK hynix position HBF as a new memory tier for AI inference workloads by combining near-memory bandwidth with the higher capacity and non-volatility of NAND flash. The technology is aimed at workloads that require substantially larger memory pools close to compute than HBM alone can economically provide. For example, while the maximum capacity of an HBM4 stack is 64GB, an HBF stack can provide up to 512GB. Even at a lower bandwidth, such memory can be useful for inference workloads. Arguably the biggest question about HBF is who is going to adopt the technology? Since Sandisk and SK hynix announced plans to collaborate on defining the HBF specification in 2025, only Google and Tenstorrent have expressed interest in participating in the HBF consortium. Meanwhile, AMD, Broadcom, Intel, Nvidia, Marvell, Micron, Qualcomm, Samsung, and Western Digital have so far expressed no interest in HBF. Follow Tom's Hardware on Google News, or add us as a preferred source, to get our latest news, analysis, & reviews in your feeds.

SK hynix, In Collaboration With SanDisk, Unveils The New High Bandwidth Flash (HBF) Standard, Helping To Resolve AI Inference Bottlenecks, Targeting Up To 3TB/s Bandwidth

As AI accelerators face severe performance disparity between High Bandwidth Memory (HBM) and SSDs, SK hynix and SanDisk have collectively introduced a solution that aims to resolve the performance gap with a new standard called High Bandwidth Flash (HBF). Both memory manufacturers aim to create an ecosystem where various enterprises can develop compatible products. HBF specifications allow for up to 512GB in a single configuration that stacks NAND dies in eight or 16 layers In a nutshell, HBF possesses attributes that allow it to be positioned between HBM and enterprise SSDs. Similar to HBM, HBF relies on multiple memory dies that have been stacked together, but instead of DRAM, it utilizes NAND flash to increase storage capacity. Its primary role will be to complement capacity limits rather than outright replace HBM. LLMs can be processed through HBM, which is immediately required for computing, with HBF storing data in a larger capacity. SK hynix's and SanDisk's latest specifications allow for HBF to go as high as 512GB, with bandwidth ranging from 0.4TB/s to 3TB/s. To understand how the technology will benefit AI inference performance, assume that there's an AI model with 500 billion parameters, and if each gigabyte can house a billion parameters, that'll come to 500GB. Since it's not cost-effective to store the entire model in HBM, companies can leverage HBF to store these AI models. High Bandwidth Flash also supports the UCIe (Universal Chiplet Interconnect Express) specification, allowing HBF to connect to various CPUs and GPUs to introduce an entire flexibility layer. Kim Chun-sung, head of solution development at SK hynix, has said that the company "will expand the boundaries between memory and storage and contribute to building new architectures that enhance overall system efficiency." As SK hynix and SanDisk make efforts to popularize the HBF standard, Samsung is already establishing a healthy relationship with the likes of NVIDIA by developing and mass-producing CMX solutions. Through the manufacturing of its V10 and V11 NAND flash, which can reach up to 500 stacked layers, the Korean giant will target ultra-fast storage requirements for AI servers wanting to quickly access data to increase GPU offloading, leading to better AI inference. Which standard will pick up the pace? It looks like we'll find out in the coming months. News Source: SK hynix Follow Wccftech on Google to get more of our news coverage in your feeds.

SK hynix, Sandisk unveil standards for high-bandwidth flash memory - The Korea Times

A concept image of high-bandwidth flash, the technology standards of which SK hynix and Sandisk will release at the Future of Memory and Storage 2026 exhibition in California this week / Courtesy of SK hynix SK hynix and Sandisk have introduced the industry's first standards for high-bandwidth flash (HBF), a storage technology designed to accelerate artificial intelligence (AI) inference by enabling faster data transfers, similar to the role high-bandwidth memory (HBM) plays in AI systems. According to SK hynix, the two companies will unveil the standards at the Future of Memory and Storage 2026 exhibition, held in California from Tuesday through Thursday (local time). Through keynote speeches and panel discussions, they will present HBF as a key technology for addressing memory bottlenecks in the AI era. In AI accelerators, HBF is designed to sit between HBM and storage devices such as solid-state drives (SSDs). It offers significantly higher bandwidth than SSDs while retaining the large storage capacity of NAND flash memory. As AI inference drives explosive growth in the amount of data processing, HBF is drawing attention as a technology capable of delivering both high bandwidth and scalable storage capacity. The new standards came six months after SK hynix formed a consortium with Sandisk. They defined two configurations of stacking eight or 16 NAND dies, supporting capacities of up to 512 gigabytes (GB). The standards also classified bandwidth into three grades, ranging from about 0.4 terabytes per second (Tbps) to 3.0 Tbps. SK hynix stressed that HBF and logic processors will be connected through Universal Chiplet Interconnect Express (UCIe), an open standard for high-speed chiplet interconnects, allowing HBF to be more flexibly integrated with central processing units (CPUs), graphics processing units (GPUs) and other logic processors. The standards also cover interface and electrical specifications, reliability and packaging guidelines for HBF die stacks, and software guidelines for data input and output. In the semiconductor industry, publishing technical standards is generally seen as a first step toward building an ecosystem around a new technology, allowing multiple companies to develop compatible products under a common specification. SK hynix said it will leverage the standard publication as an opportunity to expand the adoption of HBF technology in the AI storage market and foster the surrounding ecosystem. With Google and Tenstorrent currently participating in the HBF consortium, the consortium will expand its reach while enhancing technical maturity and market acceptance based on open collaboration. On the first day of the event, SK hynix Executive Vice President Kim Chun-sung and Vice President Kang Uk-song will deliver a joint keynote address on improving AI infrastructure efficiency through tiered memory architecture. On Thursday, SK hynix Vice President Lim Eui-cheol, Sandisk Vice President Rajeev Nagabhirava and Google DeepMind Senior Staff Engineer Xiaoyu Ma will join a panel discussion titled "Breaking the Memory Wall with HBF." Throughout the event, SK hynix will operate a booth to showcase its new technologies including its 10th-generation 375-layer 4D NAND wafer and products. "With the rapid spread of AI applications, we are at a point where overall data processing structures must be redesigned," Kim said. "Through HBF, SK hynix will expand the boundaries between memory and storage and contribute to building new architectures that enhance overall system efficiency."

Sandisk, SK hynix release flash memory spec for AI systems By Investing.com

MILPITAS, Calif. - Sandisk Corporation (NASDAQ:SNDK) and SK hynix Inc. announced today the release of a High Bandwidth Flash technical specification through the Open Compute Project, according to a press release statement. The specification was developed through the HBF technology workstream under OCP, with Sandisk and SK hynix as primary contributors. Google and Tenstorrent joined as consortium members during the standardization process. The work began in February. The specification provides a technical framework for companies and developers designing AI inference systems and accelerators. It defines system interface, electrical and technical guidelines for designing systems that use HBF technology, including performance expectations, the xPU-HBF host interface, reliability and packaging guidance for an HBF die stack, and a software user guide for read and write operations. "AI inference is creating a new set of memory requirements, and HBF technology is designed to meet that moment," said Alper Ilkbahar, Chief Technology Officer at Sandisk. "This specification helps give system designers a practical path to bring high-capacity, high-bandwidth memory closer to compute, while enabling more flexible architectures." The specification was released within the Open Compute Project framework, making the information openly available to the industry. The standard allows HBF technology to coexist with High Bandwidth Memory in AI compute systems. Sandisk will present a keynote at The Future of Memory and Storage Conference on Wednesday at 11:40 a.m. PT at the Santa Clara Convention Center. On Thursday at 9:45 a.m. PT, Sandisk, SK hynix and Google will participate in a panel discussion about HBF technology at the same conference. This article was generated with the support of AI and reviewed by an editor. For more information see our T&C.