Huawei unveils Tau Scaling Law to bypass US sanctions and reach 1.4nm chips by 2031

Huawei proposes new path for chip development amid US sanctions

SHANGHAI/BEIJING, May 25 (Reuters) - China's Huawei Technologies expects to design high-end chips by 2031 with transistor density equivalent to 1.4-nanometre processes, despite U.S. sanctions that have made it hard for China to build the world's most advanced chips. The projection, made by Huawei on Monday in a statement, was the most eye-catching ⁠claim of what the company calls the Tau Scaling Law, a new principle for improving chips as the industry can no longer rely mainly on making transistors smaller. He Tingbo, president of Huawei's semiconductor business and director of its Scientist Committee, introduced the new concept in a keynote speech titled "New Semiconductor Path in Practice" at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai on Monday, the company said. Although Huawei did not provide independent performance data, the target is significant because 1.4 nm is expected to be close to the global frontier for advanced ⁠chipmaking around the end of the decade. China is widely seen as unlikely to reach that level through conventional manufacturing alone because Washington has restricted its access to advanced lithography tools and other key semiconductor technologies. The Tau Scaling Law focuses on cutting the time it takes signals and data to move through ⁠chips and computing systems, Huawei said. If successful, it could offer the company a way to improve performance and chip density despite restrictions on China's access to the most advanced semiconductor equipment. Huawei said its Kirin ⁠chips scheduled to launch in the fall of 2026 would be the first to use a related architecture called LogicFolding, which the company said would shorten wiring inside chips and ⁠considerably improve performance. It had designed and mass-produced 381 chips over the past six years based on the Tau Scaling Law, for use in industries including smartphones and AI computing, the company said. Reporting by Che Pan, Eduardo Baptista and Casey Hall; Editing by Muralikumar Anantharaman Our Standards: The Thomson Reuters Trust Principles., opens new tab * Suggested Topics: * Asia Pacific Eduardo Baptista Thomson Reuters Eduardo Baptista is a Senior Correspondent for Reuters based in Beijing, covering China's technology, space, and automotive industries. He has led enterprise and investigative reporting on China's military-linked companies, artificial intelligence and semiconductor supply chains, as well as macroeconomic and industrial policy. Baptista has reported from China for nearly a decade and holds a BA in History from the University of Cambridge. Casey Hall Thomson Reuters Casey has reported on China's consumer culture from her base in Shanghai for more than a decade, covering what Chinese consumers are buying, and the broader social and economic trends driving those consumption trends. The Australian-born journalist has lived in China since 2007.

Huawei unveils 'Tau Scaling Law' as China's workaround for US chip sanctions

He Tingbo used a Shanghai keynote to argue that cutting signal-propagation time, not shrinking transistors, is the new frontier, and that Huawei has been quietly building chips around the idea for six years. Huawei used the opening day of the IEEE International Symposium on Circuits and Systems in Shanghai on Monday to argue that the global semiconductor industry needs a different organising principle, and that it has one ready. He Tingbo, who runs Huawei's semiconductor business and chairs its Scientist Committee, told the conference the company has spent the past six years developing what it calls the Tau (τ) Scaling Law, and is now applying it across its chip line. The proposition is that geometric scaling, the steady shrinking of transistors that has guided the industry for more than fifty years, is no longer doing the work it used to. The τ Scaling Law puts the time it takes for signals and data to move through a chip and its surrounding system at the centre of design instead, according to the company's announcement. Shorten that time, the argument runs, and you can keep pushing performance and effective transistor density without depending on the manufacturing breakthroughs Huawei has been cut off from. He used the keynote, titled "New Semiconductor Path in Practice", to introduce an architecture called LogicFolding, which Huawei said reorganises circuit layouts to shorten critical-path wiring and reduce the resistive and capacitive load on signal propagation. The Kirin chips scheduled for launch in the autumn will be the first to ship with it, the company said. The headline figure is a longer-dated one. By 2031, Huawei expects to design high-end chips with transistor density equivalent to a 1.4-nanometre process, a band most of the industry expects to reach toward the end of the decade through extreme ultraviolet lithography that Chinese firms cannot legally buy. Huawei did not publish independent performance data to support the projection. Over the past six years, He said, Huawei has designed and mass-produced 381 chips based on the τ principle, for use in smartphones, AI computing, and other categories the company did not itemise. The claim is, for now, Huawei's alone; no third party has audited the figure. The backdrop is familiar. Washington has spent four years tightening export controls on the lithography tools, design software, and high-bandwidth memory that the most advanced nodes require, and ASML, the Dutch firm that makes the EUV systems Huawei would need to manufacture at 1.4 nm conventionally, remains barred from shipping its most capable equipment to China. The MATCH Act under discussion in Washington would tighten the perimeter further. Huawei has responded by trying to design around the constraint rather than wait for it to lift. The company has been laying the groundwork for that argument in public for months. The tour of its secret chip lab on Chinese state television in late October, two days before Donald Trump's arrival in Beijing, made the point geopolitically. Monday's keynote made it technically. He Tingbo, sometimes referred to in the Chinese press as the country's "chip queen", has been running Huawei's semiconductor effort since 2003 and is now the public face of the self-reliance push. Whether the τ Scaling Law is a coherent design philosophy or a rebrand of well-established techniques in circuit-level optimisation will take longer to settle. The company framed the announcement as an invitation, with He calling for scientists, engineers, and industry partners around the world to work on it jointly. The audience for that invitation, in practical terms, sits mostly inside China. The first test will arrive in the autumn, when the Kirin chips reach buyers. The longer one runs to 2031.

Huawei touts new chipmaking technology to sidestep US restrictions

Shanghai (AFP) - Chinese tech giant Huawei said on Monday it had developed a new way of making semiconductors that could get around its US-enforced lack of access to the most advanced chipmaking equipment. Huawei has in recent years been at the centre of a geopolitical standoff after Washington warned its equipment could be used for espionage by the Chinese government, an allegation the firm denies. Sanctions since 2019 have cut Huawei's access to components and technologies made by the United States and some of its allies -- including the lithography machines used to make the world's most advanced chips. But on Monday the head of Huawei's semiconductor division He Tingbo said that the company will be able to produce next-generation 1.4-nanometre (1.4nm) chips by 2031. Taiwan's TSMC, the industry leader, has projected it will be able to do the same by 2028. Cutting-edge chips that can train and power artificial intelligence systems are a crucial and highly sensitive element of the technology rivalry between the United States and China. The computing power of chips has increased dramatically over the decades as makers cram them with more microscopic electronic components. Huawei's announcement suggests it might have sidestepped the need for extreme ultraviolet lithography (EUV) machines, which have been considered crucial for mass manufacturing chips of 5nm or under. "Over the past six years, I have often been asked... how did you survive and come back on top?" He said in a presentation to the International Symposium on Circuits and Systems (ISCAS) in Shanghai. She said the new technique came about through a shift in how chipmaking has historically been conceptualised. "Moore's Law" is a principle developed by Intel co-founder Gordon Moore which states the number of transistors -- devices regulating the flow of electricity -- on a chip doubles every two years. A higher density of transistors results in a smaller chip or one the same size with faster processing power. He on Monday proposed "the Tau Scaling Law", or "Her's Law", by which instead of optimising for space, designers optimise for the time taken for the various elements making up a chip to communicate. This overcomes a key challenge facing Moore's Law that Intel sums up as: "You can make something smaller and smaller and smaller... until you can't". US sanctions have meant that "these challenges arrived earlier and are tougher" for Huawei, He said. "Our solution is feasible and affordable. The performance of the new chip can fully compete with that of the other path," she said. Huawei's next iteration of its Kirin chip, set to launch in the autumn, will be the first ever to fully adopt an architecture called "LogicFolding" based on the new principle, the company said. The Tau Scaling Law "underscores the company's ambition to lead rather than follow in the global chip race", said George Chen, Partner and Chair of Digital Practice at The Asia Group. "Even without a new product launch today, Huawei's intent is clear -- and its trajectory will likely heighten US concerns."

Huawei proposes new path for chips as Moore's Law runs out of road

The tech giant claims it can reach cutting-edge chip density by 2031, closing the gap with TSMC. Huawei has proposed a new guiding principle for the semiconductor industry that it says could allow it to design chips rivalling the world's most advanced processes, without needing the cutting-edge manufacturing equipment it has been denied under US sanctions. At the 2026 IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai today (25 May), He Tingbo, president of Huawei's semiconductor business and chair of its Scientist Committee, delivered a keynote speech entitled 'New Semiconductor Path in Practice', in which she presented what the company calls the 'Tau Scaling Law'. The law proposes replacing geometric scaling, the decades-old practice of physically shrinking transistors, with time scaling as the new guiding principle for semiconductor evolution. The idea is to reduce the time it takes for signals to propagate through chips and computing systems rather than making individual components smaller. The principle has already acquired a nickname: "Her's Law", according to the South China Morning Post - a play on both He Tingbo's surname and the tradition of naming foundational scientific laws after their originators, as with Moore's Law. The approach relies heavily on a technology Huawei calls LogicFolding. By breaking down the physical boundaries of traditional circuit layouts and significantly shortening critical-path wiring, LogicFolding aims to reduce resistive and capacitive load on signal propagation, ultimately boosting transistor density and circuit performance. The ambitious production target puts Huawei in direct competition with the world's leading chipmakers. According to Bloomberg, there is currently around a five-year gap between what TSMC can produce and what Huawei, working with its manufacturing partner SMIC, is capable of. TSMC, the world's largest producer of advanced chips, currently uses 2nm manufacturing technology and plans to introduce a 1.4nm process for mass production in 2028. Huawei says it will reach that same 1.4nm equivalence by 2031, although it did not provide independent data to support its claims Huawei says the framework is already in production. Over the past six years, it has designed and mass-produced 381 chips based on the Tau Scaling Law, for industries from smartphones to AI computing, it says. The Kirin chips scheduled to launch in autumn 2026 will be the first to adopt the LogicFolding architecture. "We believe that openness and collaboration are key to driving ongoing progress in the semiconductor industry," He Tingbo said. "No single company can independently find all the answers along the path of semiconductor evolution." Nvidia CEO Jensen Huang recently told CNBC the company had "largely conceded" China's AI chip market to Huawei. Don't miss out on the knowledge you need to succeed. Sign up for the Daily Brief, Silicon Republic's digest of need-to-know sci-tech news.

HUAWEI presents Tau (τ) Scaling Law, tackling Moore's Law challenges

Today, at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), HUAWEI presented its new Tau (τ) Scaling Law, a new principle for guiding the future development of the semiconductor industry. Historically, the semiconductor industry has relied on Moore's law to reduce chip size and increase the number of transistors. This law, according to HUAWEI, proposes replacing geometric scaling (Moore's law logic) with time (τ) scaling as a new guiding principle for the evolution of both semiconductors and electronic systems. Moore's Law states that the number of transistors on a microchip roughly doubles every two years, improving computing performance while reducing costs. Chipmakers achieve this by shrinking transistor sizes, allowing chips to become faster, more power-efficient, and cooler. Mobile processor manufacturers and foundries such as TSMC and Samsung rely on this process to deliver higher performance with efficient power consumption. Currently, the Mobile processor industry is in 3nm process technology and moving towards 2nm. Shrinking silicon beyond 3nm requires ultra-complex machinery such as High-NA EUV lithography, which contradicts Moore's law of reduced cost per generation. And HUAWEI exactly addresses this issue with its new Tau (τ) Scaling Law. By replacing geometric scaling with time (τ) scaling, innovative technologies such as LogicFolding can be used to continuously compress signal propagation delay and steadily improve transistor density, which will drive the ongoing evolution of semiconductors and electronic systems. This tech would reduce signal delay across devices, circuits, chips, and full systems, eventually increasing performance. Based on this law, HUAWEI has developed innovative core technologies like LogicFolding and established a multi-level co-optimization mechanism that spans semiconductor devices, circuits, chips, and systems. This mechanism aims to systematically shorten the time constant τ in order to drive up performance, energy efficiency, and transistor density at each level in the following ways: HUAWEI claims to have already designed and mass-produced 381 chips based on the τ Scaling Law. At her keynote speech, elaborating on the application of the τ Scaling Law to smartphones and AI computing, He Tingbo, from HUAWEI, announced that upcoming Kirin chips will follow this law and its new LogicFolding architecture. The Kirin chips scheduled to launch in Fall 2026 will be the first ever to adopt the LogicFolding architecture, which will considerably enhance the chips' performance, says the company. Compared to a conventional System on Chip (SoC) design, LogicFolding design on 2026 Kirin Chips is said to bring 53.5% increase in transistor density, reaching up to 238 MTr/mm², 40% increase of P-core power efficiency, and a max clock frequency increase of 12.7%, reaching up to 3.1GHz by 2026. By 2031, the high-end chips based on this LogicFolding architecture will feature a transistor density that is equivalent to 14 Å (1.4 nm) processes. At the conference presentation, Ms. He Tingbo, President of the Semiconductor Business Dept, said,

Huawei unveils new scaling law for advanced chip development By Investing.com

Investing.com -- Huawei Technologies presented a new scaling law and chip architecture on Monday that the company said could bring its chips to a transistor density equivalent to 1.4 nanometer process nodes by 2031. He Tingbo, chair of Huawei Scientist Committee and president of the company's semiconductor business department, introduced the Tau Scaling Law at the 2026 IEEE International Symposium on Circuits and Systems in Shanghai on Monday. He described the principle as guiding the next step in development of semiconductors and electronic systems. He said Huawei had used the scaling law to design and mass produce 381 chips over the past six years. The principle, called Her's Law by He's peers, proposes replacing traditional geometric miniaturization of transistors with time scaling. He also presented LogicFolding architecture, a technology designed to reduce resistive and capacitive load of signal propagation and increase transistor density. Huawei's new Kirin chips, scheduled to launch later this year, will be the first to use the LogicFolding architecture, He said. The company has expanded development of its Ascend AI chips and Kunpeng processors as it seeks to address domestic computing demand previously met by companies such as Nvidia. Huawei plans to launch its Ascend 950 series, including the 950PR and 950DT models, in 2026. The company will release the Ascend 960 in 2027 and the Ascend 970 in 2028, running parallel to AI chip releases from Nvidia and Advanced Micro Devices. This article was generated with the support of AI and reviewed by an editor. For more information see our T&C.