3 Sources
[1]
AMD: Our Next Server Chips Will Trounce Nvidia's Vera
AMD claims the per-rack performance of its new chips could be more than three times higher than Vera's. This just gets me more excited for Zen 6 consumer chips. AMD isn't taking Nvidia's recent performance projections on its new Vera CPUs lying down. After Team Green approved some Phoronix test
[2]
AMD says its next-gen EPYC 'Venice' processor is over 3X faster than NVIDIA Vera
At Computex 2026, NVIDIA unveiled Vera, its new CPU purpose-built for large-scale AI deployments and agentic systems. With its 88-core Arm-based design, it's a general-purpose data center-focused CPU powered by Arm v9.2-A 'Olympus' cores. Compared to the previous generation's Grace processor,
[3]
AMD EPYC Outpaces Rivals in New Agentic AI Infrastructure Benchmark
The supporting CPU infrastructure becomes critical: orchestration services, databases, web front ends, caches, middleware, APIs and control-plane services all need to scale efficiently within real rack power and thermal limits. Agentic AI is changing the shape of infrastructure. As enterprises
Share
Copy Link
AMD has released benchmark projections showing its next-generation 256-core EPYC Venice processor could deliver 3.3X better per-rack performance than Nvidia's new Vera CPU. The estimates focus on rack-level deployments with a 100 kW power budget, positioning AMD's Zen 6-based chips as superior for agentic AI infrastructure that requires massive CPU capacity for orchestration and control services.
AMD has fired back at Nvidia's recent CPU performance demonstrations, releasing estimated benchmarks that position its upcoming AMD EPYC Venice processors as substantially faster than Nvidia Vera in AI infrastructure deployments
1
. The company claims its next-generation Zen 6-based Epyc server chips could deliver 3.3X better per-rack performance than Nvidia's 88-core Vera CPU when deployed in a 100 kW power budget configuration2
.
Source: PC Magazine
The timing is significant. After Nvidia showcased Vera at Computex 2026 as a purpose-built processor for large-scale AI deployments, claiming 1.5X IPC improvements over its Grace predecessor and roughly 50% faster performance than existing x86 solutions, AMD moved quickly to assert its competitive position
2
. The response highlights how CPU infrastructure for agentic AI has become a critical battleground as enterprises scale from experimental AI projects to production systems.AMD's performance projections require careful interpretation. The company isn't presenting like-for-like chip comparisons but rather rack-level throughput estimates based on a modeled 100 kW rack scenario using two-processor platforms
1
. AMD explicitly states these results are "intended to provide directional comparison rather than direct measured rack benchmarks," since actual Vera chips aren't available for testing1
.The methodology normalizes Nvidia Vera performance at 1.0, then scales AMD's current 192-core EPYC 9965 Turin processor to 2.37X and the future 256-core AMD EPYC Venice to 3.3X
2
. For Venice, AMD scaled up EPYC 9965 results from internal testing by 1.7X, betting that the combination of Zen 6 architecture, TSMC 2nm process node, and an additional 64 cores will deliver that performance leap1
.The benchmarks span workloads critical to agentic AI infrastructure: SPEC CPU 2017, server-side Java based on SPECjbb 2015, WRK Tool for NGINX web server loads, Redis-benchmark for in-memory workloads, Memcached for memory caching, and TPROC-C on MySQL for database performance
1
. AMD argues this full workload set provides a more realistic picture than isolated benchmarks.The performance gap stems largely from core density advantages. AMD EPYC Venice offers over 36,000 cores per rack compared to Nvidia Vera's 22,500 cores in the same power envelope
2
. Even on a performance-per-core basis, AMD claims Venice delivers a 27% advantage over Vera2
.AMD also emphasizes practical deployment considerations. Its processors run on standard liquid-cooled data center equipment with x86 software compatibility, preserving existing enterprise software ecosystems
3
. This contrasts with the specialized hardware and racks required for Nvidia's Vera Rubin platform2
, potentially reducing migration friction and shortening time-to-production for enterprises3
.Related Stories
As agentic AI systems move from experimental phases to production deployments, the CPU layer has gained strategic importance. While GPU performance dominates AI training discussions, agentic systems require substantial CPU capacity for orchestration services, databases, web front ends, caches, middleware, APIs, and control-plane services that must scale efficiently within rack power and thermal limits
3
.
Source: DT
AMD argues that general-purpose CPU capacity, not accelerator peak performance, sets the ceiling for how many agents an enterprise can actually run and at what cost
3
. Higher-density configurations within fixed power envelopes translate directly into more service capacity per rack, driving capital efficiency and floor-space utilization3
.The competitive dynamics extend beyond AI server performance comparisons. The Zen 6 architecture and TSMC 2nm process underlying Venice will also power consumer Ryzen CPUs
1
. If AMD achieves anything close to the projected 1.7X performance jump with only a one-third increase in cores, the new node and architecture would be doing significant work1
. This suggests substantial consumer chip improvements could arrive early next year, particularly as Intel's Nova Lake also shapes up as a competitive offering1
.For enterprises evaluating AI infrastructure investments, AMD's positioning emphasizes that customers deploy racks constrained by power, cooling, floor space, and software compatibility—not isolated benchmark headlines
3
. The current EPYC 9965 is available now on shipping platforms, while Venice represents a future capability2
. AMD's benchmarks also show the EPYC 9965 delivering roughly 1.6X the rack-level throughput of Intel Xeon 6980P3
, positioning AMD favorably against both major competitors in the AI infrastructure market.Summarized by
Navi
[1]
23 Jul 2026•Technology

06 Jan 2026•Technology

13 Jun 2025•Technology
