3 Sources
[1]
AMD: Our Next Server Chips Will Trounce Nvidia's Vera
AMD claims the per-rack performance of its new chips could be more than three times higher than Vera's. This just gets me more excited for Zen 6 consumer chips. AMD isn't taking Nvidia's recent performance projections on its new Vera CPUs lying down. After Team Green approved some Phoronix test results showing Vera beating AMD's Epyc server chips in several tests, AMD has released estimated comparisons of its next-generation Venice Epyc chips based on its Zen 6 architecture, Tom's Hardware reports. It claims the per-rack performance of its new chips could be more than three times higher than Vera's. Nvidia's new 88-core Vera CPUs will pair up with its Rubin GPUs as part of its major AI server rack hardware package later this year. It can support up to 176 simultaneous threads, handle up to 1.5TB of LPDDR5X memory, and should be far faster than its last-generation Grace designs. By the recent Phoronix numbers, they're faster than AMD and Intel alternatives, too, but AMD claims what's coming next should take the crown. AMD's numbers are a little bit specific, though. It's not releasing like-for-like performance results; instead, it's showing rack performance with a 100 kW deployment. It's an estimation, too, not actual testing, because it doesn't have Vera chips on hand. That doesn't tell us exactly what to expect from its next-gen Epyc designs on a per-chip or per-core basis, but it's still claiming big performance wins. The 256-core Epyc results, for example, are based on scaling up the Epyc 9965 results from internal testing by 1.7 times. Because AMD believes the combination of Zen 6 architecture, TSMC 2nm node, and additional 64 cores will deliver that kind of performance leap. AMD even says in the methodology that the results are "intended to provide directional comparison rather than direct measured rack benchmarks." With that dizzying list of caveats and provisos out of the way, AMD claims that if a Vera CPU's performance is normalized at 1.0, its Epyc 9965 chip would be 2.37, and its next-generation Venice 256C could be 3.3. This is based on this list of benchmarks: * SPEC CPU 2017 * Server-side Java based on SPECjbb 2015 * WRK Tool for load on an NGINX web server * Redis-benchmark for in-memory workloads * Memory caching with Memcached * Database performance with TPROC-C on MySQL These are effectively measuring agentic AI performance, so none of this is really for us. AMD is claiming its next AI CPU will be better than Nvidia's new one. But! It's using the Zen 6 architecture built on the new TSMC 2nm process node, and these two things will be true of the Zen 6 Ryzen CPUs for the rest of us, too. If AMD can manage anything close to a 1.7x performance jump in reality, with "only" a 1/3 bump in cores, the new node and architecture must be doing some heavy lifting too. With Intel's Nova Lake shaping up to be something quite special, I'm excited to see how these next-generation chips compare early next year. Much more than I am for Epyc and Vera.
[2]
AMD says its next-gen EPYC 'Venice' processor is over 3X faster than NVIDIA Vera
At Computex 2026, NVIDIA unveiled Vera, its new CPU purpose-built for large-scale AI deployments and agentic systems. With its 88-core Arm-based design, it's a general-purpose data center-focused CPU powered by Arm v9.2-A 'Olympus' cores. Compared to the previous generation's Grace processor, NVIDIA claims a 1.5X increase in IPC and around 50% faster performance than existing x86 solutions. Although a lot of the focus in the past has been placed on GPU performance, with the rise of AI factories and agents, the CPU is quickly becoming a critical component - and it's an area or market that's still relatively new for NVIDIA. Not so for AMD, which has been delivering its data center-focused EPYC processors for years now. When it comes to AI, AMD has released new performance benchmarks showing that its EPYC lineup, including the next-gen 256-core EPYC 'Venice' processor, outperforms NVIDIA Vera and Intel Xeon. However, it's worth noting that these benchmarks are based on a single data-center rack with a 100 kW power budget, and Vera's performance is an estimate based on currently available data. "Data centers are provisioned in racks, and racks are bounded by a fixed power and thermal budget, finite floor space, software-compatibility requirements, and operational readiness," AMD explains. Adding that its numbers are based on a full workload set rather than a "single favorable benchmark." And based on that, AMD's chart uses NVIDIA Vera and its 88 cores as the baseline. Here we see its current 192-core AMD EPYC 9965 'Turin' processor deliver 2.37X more performance, with the next-gen 256-core AMD EPYC 'Venice' processor delivering a 3.3X performance increase. Naturally, these numbers account for rack density, with EPYC Venice offering over 36,000 cores per rack compared to NVIDIA Vera's 22,500 cores. And when it comes to "performance-per-core," AMD adds that 'Venice' delivers a 27% advantage when compared to Vera. "These AMD deployments run on standard liquid-cooled data center equipment, and the x86 software ecosystem enterprises already operate," AMD adds, in a nod to the specialized hardware and racks required for NVIDIA's new Vera Rubin platform. "Agentic AI infrastructure should be planned at the rack level, not around isolated component claims. On that basis, the conclusion is straightforward: AMD EPYC delivers higher deployable CPU throughput, x86 software continuity and a standards-based path to dense, AI-supporting infrastructure. And it's available today on shipping platforms. For enterprises scaling toward production agentic AI, that combination of density, compatibility and deployability is what turns performance into capacity."
[3]
AMD EPYC Outpaces Rivals in New Agentic AI Infrastructure Benchmark
The supporting CPU infrastructure becomes critical: orchestration services, databases, web front ends, caches, middleware, APIs and control-plane services all need to scale efficiently within real rack power and thermal limits. Agentic AI is changing the shape of infrastructure. As enterprises move from isolated AI experiments to production agentic systems, the supporting CPU infrastructure becomes critical: orchestration services, databases, web front ends, caches, middleware, APIs and control-plane services all need to scale efficiently within real rack power and thermal limits. Customers do not deploy benchmark headlines; they deploy racks constrained by power, cooling, floor space, software compatibility and operational readiness. Evaluated through that lens, AMD EPYC™ processors demonstrate clear rack-scale leadership. Under the modeled 100 kW rack scenario, AMD EPYC™ 9965 delivers an estimated 2.37x the rack-level throughput of the NVIDIA Vera baseline and roughly 1.6x that of Intel Xeon 6980P. Next-generation AMD EPYC "Venice" is projected to extend the Vera comparison to 3.30x. Just as important, this is infrastructure customers can build today on standard x86 platforms, not a future architecture they have to wait for. As agentic deployments move into production, the volume of this supporting infrastructure grows with them. The processor platform that hosts these services becomes a primary determinant of how many agents an enterprise can actually run, and at what cost. This is the layer where general-purpose CPU capacity, not accelerator peak performance, sets the ceiling. That's the lens this analysis uses. All configurations are normalized to a modeled 100 kW rack built on 2P (two-processor) platforms, so the comparison reflects deployable service capacity rather than isolated peak processor behavior. Higher-density configurations translate directly into more service capacity per rack. This is what drives capital efficiency, floor-space utilization and operational simplicity. The pattern is consistent: As core density rises within the fixed power envelope, aggregate service throughput rises with it. For the transactional, web-serving and middleware tiers that surround agentic systems, that means materially more concurrency and responsiveness per rack, the qualities that ultimately govern how many agents an environment can sustain. These AMD deployments run on run on standard liquid-cooled data center equipment and the x86 software ecosystem enterprises already operate, with no new rack architecture required - preserving software continuity, reducing migration friction and shortening time-to-production.
Share
Copy Link
AMD has released benchmark projections showing its next-generation 256-core EPYC Venice processor could deliver 3.3X better per-rack performance than Nvidia's new Vera CPU. The estimates focus on rack-level deployments with a 100 kW power budget, positioning AMD's Zen 6-based chips as superior for agentic AI infrastructure that requires massive CPU capacity for orchestration and control services.
AMD has fired back at Nvidia's recent CPU performance demonstrations, releasing estimated benchmarks that position its upcoming AMD EPYC Venice processors as substantially faster than Nvidia Vera in AI infrastructure deployments
1
. The company claims its next-generation Zen 6-based Epyc server chips could deliver 3.3X better per-rack performance than Nvidia's 88-core Vera CPU when deployed in a 100 kW power budget configuration2
.
Source: PC Magazine
The timing is significant. After Nvidia showcased Vera at Computex 2026 as a purpose-built processor for large-scale AI deployments, claiming 1.5X IPC improvements over its Grace predecessor and roughly 50% faster performance than existing x86 solutions, AMD moved quickly to assert its competitive position
2
. The response highlights how CPU infrastructure for agentic AI has become a critical battleground as enterprises scale from experimental AI projects to production systems.AMD's performance projections require careful interpretation. The company isn't presenting like-for-like chip comparisons but rather rack-level throughput estimates based on a modeled 100 kW rack scenario using two-processor platforms
1
. AMD explicitly states these results are "intended to provide directional comparison rather than direct measured rack benchmarks," since actual Vera chips aren't available for testing1
.The methodology normalizes Nvidia Vera performance at 1.0, then scales AMD's current 192-core EPYC 9965 Turin processor to 2.37X and the future 256-core AMD EPYC Venice to 3.3X
2
. For Venice, AMD scaled up EPYC 9965 results from internal testing by 1.7X, betting that the combination of Zen 6 architecture, TSMC 2nm process node, and an additional 64 cores will deliver that performance leap1
.The benchmarks span workloads critical to agentic AI infrastructure: SPEC CPU 2017, server-side Java based on SPECjbb 2015, WRK Tool for NGINX web server loads, Redis-benchmark for in-memory workloads, Memcached for memory caching, and TPROC-C on MySQL for database performance
1
. AMD argues this full workload set provides a more realistic picture than isolated benchmarks.The performance gap stems largely from core density advantages. AMD EPYC Venice offers over 36,000 cores per rack compared to Nvidia Vera's 22,500 cores in the same power envelope
2
. Even on a performance-per-core basis, AMD claims Venice delivers a 27% advantage over Vera2
.AMD also emphasizes practical deployment considerations. Its processors run on standard liquid-cooled data center equipment with x86 software compatibility, preserving existing enterprise software ecosystems
3
. This contrasts with the specialized hardware and racks required for Nvidia's Vera Rubin platform2
, potentially reducing migration friction and shortening time-to-production for enterprises3
.Related Stories
As agentic AI systems move from experimental phases to production deployments, the CPU layer has gained strategic importance. While GPU performance dominates AI training discussions, agentic systems require substantial CPU capacity for orchestration services, databases, web front ends, caches, middleware, APIs, and control-plane services that must scale efficiently within rack power and thermal limits
3
.
Source: DT
AMD argues that general-purpose CPU capacity, not accelerator peak performance, sets the ceiling for how many agents an enterprise can actually run and at what cost
3
. Higher-density configurations within fixed power envelopes translate directly into more service capacity per rack, driving capital efficiency and floor-space utilization3
.The competitive dynamics extend beyond AI server performance comparisons. The Zen 6 architecture and TSMC 2nm process underlying Venice will also power consumer Ryzen CPUs
1
. If AMD achieves anything close to the projected 1.7X performance jump with only a one-third increase in cores, the new node and architecture would be doing significant work1
. This suggests substantial consumer chip improvements could arrive early next year, particularly as Intel's Nova Lake also shapes up as a competitive offering1
.For enterprises evaluating AI infrastructure investments, AMD's positioning emphasizes that customers deploy racks constrained by power, cooling, floor space, and software compatibility—not isolated benchmark headlines
3
. The current EPYC 9965 is available now on shipping platforms, while Venice represents a future capability2
. AMD's benchmarks also show the EPYC 9965 delivering roughly 1.6X the rack-level throughput of Intel Xeon 6980P3
, positioning AMD favorably against both major competitors in the AI infrastructure market.Summarized by
Navi
[1]
06 Jan 2026•Technology

13 Jun 2025•Technology

21 May 2026•Technology

1
Technology

2
Business and Economy

3
Health
